CH613790A5 - Arrangement for controlling the temporary storage of data, to be transmitted between two functional units of a data processing system, in a buffer memory - Google Patents

Arrangement for controlling the temporary storage of data, to be transmitted between two functional units of a data processing system, in a buffer memory

Info

Publication number
CH613790A5
CH613790A5 CH204777A CH204777A CH613790A5 CH 613790 A5 CH613790 A5 CH 613790A5 CH 204777 A CH204777 A CH 204777A CH 204777 A CH204777 A CH 204777A CH 613790 A5 CH613790 A5 CH 613790A5
Authority
CH
Switzerland
Prior art keywords
data
transmitted
arrangement
controlling
processing system
Prior art date
Application number
CH204777A
Other languages
English (en)
Inventor
Friedrich Dr Klan
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH613790A5 publication Critical patent/CH613790A5/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)
CH204777A 1976-03-12 1977-02-18 Arrangement for controlling the temporary storage of data, to be transmitted between two functional units of a data processing system, in a buffer memory CH613790A5 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762610428 DE2610428C3 (de) 1976-03-12 1976-03-12 Anordnung zur Steuerung der Zwischenspeicherung von zwischen zwei Funktionseinheiten zu übertragenden Daten in einem Pufferspeicher

Publications (1)

Publication Number Publication Date
CH613790A5 true CH613790A5 (en) 1979-10-15

Family

ID=5972294

Family Applications (1)

Application Number Title Priority Date Filing Date
CH204777A CH613790A5 (en) 1976-03-12 1977-02-18 Arrangement for controlling the temporary storage of data, to be transmitted between two functional units of a data processing system, in a buffer memory

Country Status (8)

Country Link
AT (1) AT377107B (enrdf_load_stackoverflow)
BE (1) BE852339A (enrdf_load_stackoverflow)
CH (1) CH613790A5 (enrdf_load_stackoverflow)
DE (1) DE2610428C3 (enrdf_load_stackoverflow)
FR (1) FR2344073A1 (enrdf_load_stackoverflow)
GB (1) GB1575074A (enrdf_load_stackoverflow)
IT (1) IT1077686B (enrdf_load_stackoverflow)
NL (1) NL168969C (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE399773B (sv) * 1977-03-01 1978-02-27 Ellemtel Utvecklings Ab Adress- och avbrottsignalgenerator
US4218758A (en) * 1978-06-30 1980-08-19 International Business Machines Corporation Parallel-to-serial binary data converter with multiphase and multisubphase control
US4298954A (en) * 1979-04-30 1981-11-03 International Business Machines Corporation Alternating data buffers when one buffer is empty and another buffer is variably full of data
CA1143856A (en) * 1979-09-26 1983-03-29 Anthony K. Fung Circular-queue structure
DE3021306A1 (de) * 1980-06-06 1981-12-24 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Anordnung mit einem wenigstens zwei teilnehmern gemeinsamen datenspeicher
DE3149678C2 (de) * 1981-12-15 1984-02-23 Siemens AG, 1000 Berlin und 8000 München Anordnung zur Zwischenspeicherung von zwischen zwei Funktionseinheiten in beiden Richtungen zu übertragenden Informationen in einem Pufferspeicher
DE3239997C1 (de) * 1982-10-28 1984-04-12 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Durchfuehrung von kontinuierlichen Datentransfers bei der Ausfuehrung von Ein-/Ausgabeoperationen ueber Selektor- oder Blockmultiplexkanaele des Ein-/Ausgabewerkes einer Datenverarbeitungsanlage
DE3727434C2 (de) * 1987-08-17 1997-04-30 Siemens Ag Anordnung zum Übertragen von in mehrere Teilwörter unterteilten Datenwörtern

Also Published As

Publication number Publication date
DE2610428C3 (de) 1980-06-19
NL168969C (nl) 1982-05-17
FR2344073A1 (fr) 1977-10-07
NL168969B (nl) 1981-12-16
NL7702551A (nl) 1977-09-14
FR2344073B1 (enrdf_load_stackoverflow) 1982-03-05
DE2610428A1 (de) 1977-09-15
BE852339A (fr) 1977-09-12
ATA149177A (de) 1984-06-15
IT1077686B (it) 1985-05-04
DE2610428B2 (enrdf_load_stackoverflow) 1979-09-13
AT377107B (de) 1985-02-11
GB1575074A (en) 1980-09-17

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Legal Events

Date Code Title Description
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