GB1559771A - Data recorders - Google Patents

Description

(54) IMPROVEMENTS IN OR RELATING TO DATA RECORDERS (71) We, THE PLESSEY COMPANY LIMITED, a British Company of 2/60 Vicarage Lane, Ilford, Essex do hereby declare the invention for which we pray that a patent may be granted to us, and by the method by which it is to be performed, to be particularly described in and by the follow mg statement: This invention relates to data records.

Hitherto data recorders such as single channel or multi-channel recorders for event recording have comprised a nonvolatile date storage medium which is operatively associated with apparatus comprising moving parts during recording and/or playback. Such known recorders are punch tape recorders, magnetic tape recorders, and pen recorders for example. It is an object of the present invention to provide a data recorder m which no moving parts are essentially required.

According to the present invention a data recorder comprises a non-volatile solid state memory device and a connector means to which said device can be detachably connected, a clock pulse generator and an address counter arranged to be started into operation consequent upon receipt of data and to receive clock pulses from said clock pulse generator whereby the sequential coupling of addresses in the said device to sampling means responsive to the store content at the sequentially coupled addresses is efected, the address counter being inhibited by said sampling means, at the first empty address and a write sequence being initiated during which data corresponding to the data received is written into the first empty address in the said device.

By utilising a solid state memory device the need for moving parts is obviated and by utilising a PROM a relaively small size store may be provided which is robust and which may be programmed by means of relatively simple circuitry. It may be arranged that the said device has associated with it a plug or socket whereby it can be simply detachably connected to the data recorder.

The data recorder may include a power supply economiser unit responsive to incoming data for switching power to parts of the data recorder whereby the electrical power consumed is significant only when the incoming data is received and recorded. This feature is particularly useful for battery operation which may be required for some data recording applications in which the data recorder is potitioned remotely from a mains power supply.

The means for writing date into the said device may comprise a write circuit which is arranged to produce pulses necessary for writing, the write circuit being operated under control of a timing PROM fed from a further counter, the further counter being started synchronously with said address counter to begin counting clock pulses when incoming data is received, the further counter being inhibited synchronously with said address counter when an empty address has been identified.

The said device may be of the kind having a plurality of parallel fed input tracks, each track having a plurality of storage addresses, incoming data being fed on one or another of a plurality of input lines to a logic circuit which identifies the data carrying input line and which sets an input counter correspondingingly, a control PROM being responsive to the count state set into the input counter for facilitating the accessing of a track of the said device into which the incoming data is required to be stored to the sampling means, such that an empty store location within the record PROM on the appropriate track is identified The control PROM may be arranged to be fed with control signals to provide for mode selection. Thus a PROM having a plurality of tracks may be fed with data discrete to each track, the tracks being fed in parallel to define one mode of operation.

Or according to an alternative mode of operation the tracks may be combined in pairs so that each pair is serially coupled, the serially coupled pairs being fed is para- llel.

According to yet another mode of operation, the tracks may be all serially coupled and fed with data aperatining to a single function.

An exemplary embodiment of the invention will now be described with reference to the drawing accompanying the Provisional specitication which is a block schematic diagram of a data recording arrangement.

Referring now to the drawing, a data logger for recording input data fed on eight parallel input lines comprises a logic circuit 1 to which input data is fed from a data input device which does not form part of the logger but which is shown schematically as switches 2 within the broken lin 3. Thus data is presumed as being fed on one of the eight input lines 4 which an appropriate switch such as switch 2a is closed. It will be appreciated that the data may represent any event or function that it is required to monitor. The data input lines are each connected to an economy circuit as shown within the broken line 5 which includes a gate 6 which feeds a flip-flop 7. The flip-flop 7 is arranged to switch on a power supply unit 8 when data is received, such that power is supplied over the line 9 to the various parts of the equipment. The power supply unit may be switched off by applying a suitable pulse to reset line 10 of the flip-flop 7, a reset pulse being provided in the event that data is not present or after a suitable time interval during which data does not obtain. As soon as power is provided to the apparatus, a clock pulse generator 11 is started to produce clock pulses which are fed to an address counter 12 which begins counting to access locations in a record PROM 13 to a sampling logic circuit 14. When sampling logic circuit 14 identifies an empty address, an inhibit pulse is fed to stop the counter 12 and to stop also a further counter 15 which was started synchronously with the counter 11 to begin counting clock pulses from the clock pulse generator 11. The counter 15 is arranged to feed a timing control PROM 16 under control of which write circuits 17 apply the appropriate pulses to the record PROM 13 as required to effect a write sequence. The record PROM 13 in the present example is an Intel 1702A which is a UV (ultra-violet) erasable device. The pulses required for the writing operation are specified by the manufacturers of the device and the write circuits are designed and controlled accordingly by the timing control PROM 16.

Although in the present embodiment a UV erasable PROM has been used, other solid state devices can be used such as once only memories in which the record once made cabnnot be removed or other erasable memories in which the data can be erased with an electrical signal. Such devices are available on single micro-circuit chips. In the present example data is fed in on eight data input lins 4 and the record PROM 13 has eight parallel record tracks. In order to ensure that the correct track is addressed, one track being provided for each data input line, a four-bit counter 18 is set by the logic circuitry 1 in accordance with the particular track on which data is fed. The counter 18 is used to set a control PROM 19 which controls the sampling logic cidcuitry 14 so that the appropriate track of the record PROM 13 is accessed by the counter to the sampling circuitry during the sampling operaton. The control PROM 1 is fed also from a mode selection switch system 20 which may be a front panel switch and which is utilised to control the particular mode of operation required. For example although in the present case eight input tracks may be fed in parallel so that each track receives data from a separate input line, it is quite possible to feed the recorder from four input lines, each input line carrying data which is fed to a pair of tracks in the record PROM, the tracks of the pair being connected in series. In this mode of operation the mode selection switch is set to produce the appropriate control operation from the control PROM 19. Alternatively, a single data input line may be provided feeding data into the eight tracks of the record PROM 13 coupled in series.

The recorder may be programmed to record the data on the input lines 4 once per hour for a week or once per hour for a month if a single channel unit is provided.

Longer spans of time or more frequent recordings can be provided dependent upon requirements.

As an alternative use of the recorder just before described, unlike the activity recorder which stores YES or NO at prescribed times, an event recorder may be provided which logs the times at which events took place. In the present case, with the Intel 1702A, up to 256 events can be stored on a single two chip module, the times in minutes the hours and days of the week being recorded for each event. On completion of the maximum number of events, a bleep or flashing lamp can be operated, and since the economy unit 5 is used, power is not consumed between recording events.

As an alternative embodiment, a solid state recorder can be arranged to store an ascending number on a single chip PROM and to emit a warning when a prescribed count has been read. Total counting capacity can be 1024 events, 2048 events, or 4096 events on a single chip. In a further embodiment of the invention analogue data may be accepted and first converted to a digital signal by means of an analogue/digital converter with resolution of one part in 128 and the digital value can be recorded once per second, once per minute, or once per hour.

The data can be read out at a convenient time, and/or stored as a permanent record.

In the present arrangement wherein a UV erasable store is used, the memory is simply erased by exposing the record PROM 13 to UV light for a prescribed period. Data stored on a record PROM such as the record PROM 13 may be fed to a teletype registered trade mark machine displayed on a cathode ray tube, or fed to a chart recorder.

A particular application of the present invention is one wherein a record over the last hour or last day, say, is always available, but wherein earlier information is automatically erased. In this way, a record of conditions proceeding on accidents for example can be obtained. this application is thus the equivalent of an emergency wire recorder of the kind widly employed in the aircraft industry.

WHAT WE CLAIM IS: 1. A data recorder comprising a nonvolatoile solid state memory device and a connector means to which said device can be detachably connected, a clock pulse generator and, an address counter arranged to be started into operation consequent upon receipt of data and to receive clock pulses from said clock pulse generator whereby the sequential coupling of addresses in the said device to sampling means responsive to the store content at the sequentially coupled addresses is effected, the address counter being inhibited by said sampling means at a first empty address and write sequence being initiated during which data corresponding to the data received is written into a first empty address in the said device.

2. A data recorder as claimed in claim 1 wherein the said device has associated with it a plug or socket whereby it can be simply detachably connected to the data recorder.

3. A data recorder as claimed in claim 1 or claim 2 including a power supply econo miser unit responsive to incoming data for switching power to parts of the data recor der whereby the electrical power consumed is significant only when the incoming data is received and recorded.

4. A data recorder as claimed in any preceeding claim wherein means for writing data into the said device comprises a write circuit which is arranged to produce pulses necessary for writing, the write circuit being operated under control of a timing prog rammable read only memory fed from a further counter, the further counter being started synchronously with said address counter to begin counting clock pulses when the incoming data is received, said further counter being inhibited synchronously with said address counter when an empty address has been identified.

5. A data recorder as claimed in claim 4 wherein the said device is of the kind having a plurality of parallel fed input tracks each track having a plurality of storage addresses, incoming data being fed on one or another of a plurality of input lines to a logic circuit which identifies the data carrying input line and which sets an input counter correspondingly, a control PROM being provided which is responsive to the counter state set into the input counter for facilitating the accessing of a track of the said device into which the incoming data is required to be stored to the sampling means, such that an empty store location within the said device on the appropriate track is identified.

6. A data recorder as claimed in claim 7, wherein the control PROM is arranfed to be fed with control signals to provide for mode selection.

7. A data recorder substantially as hereinbefore described with reference to the drawings accompanying the Provisional Specification.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (7)

**WARNING** start of CLMS field may overlap end of DESC **. count has been read. Total counting capacity can be 1024 events, 2048 events, or 4096 events on a single chip. In a further embodiment of the invention analogue data may be accepted and first converted to a digital signal by means of an analogue/digital converter with resolution of one part in 128 and the digital value can be recorded once per second, once per minute, or once per hour. The data can be read out at a convenient time, and/or stored as a permanent record. In the present arrangement wherein a UV erasable store is used, the memory is simply erased by exposing the record PROM 13 to UV light for a prescribed period. Data stored on a record PROM such as the record PROM 13 may be fed to a teletype registered trade mark machine displayed on a cathode ray tube, or fed to a chart recorder. A particular application of the present invention is one wherein a record over the last hour or last day, say, is always available, but wherein earlier information is automatically erased. In this way, a record of conditions proceeding on accidents for example can be obtained. this application is thus the equivalent of an emergency wire recorder of the kind widly employed in the aircraft industry. WHAT WE CLAIM IS:

1. A data recorder comprising a nonvolatoile solid state memory device and a connector means to which said device can be detachably connected, a clock pulse generator and, an address counter arranged to be started into operation consequent upon receipt of data and to receive clock pulses from said clock pulse generator whereby the sequential coupling of addresses in the said device to sampling means responsive to the store content at the sequentially coupled addresses is effected, the address counter being inhibited by said sampling means at a first empty address and write sequence being initiated during which data corresponding to the data received is written into a first empty address in the said device.

2. A data recorder as claimed in claim 1 wherein the said device has associated with it a plug or socket whereby it can be simply detachably connected to the data recorder.

3. A data recorder as claimed in claim 1 or claim 2 including a power supply econo miser unit responsive to incoming data for switching power to parts of the data recor der whereby the electrical power consumed is significant only when the incoming data is received and recorded.

4. A data recorder as claimed in any preceeding claim wherein means for writing data into the said device comprises a write circuit which is arranged to produce pulses necessary for writing, the write circuit being operated under control of a timing prog rammable read only memory fed from a further counter, the further counter being started synchronously with said address counter to begin counting clock pulses when the incoming data is received, said further counter being inhibited synchronously with said address counter when an empty address has been identified.

5. A data recorder as claimed in claim 4 wherein the said device is of the kind having a plurality of parallel fed input tracks each track having a plurality of storage addresses, incoming data being fed on one or another of a plurality of input lines to a logic circuit which identifies the data carrying input line and which sets an input counter correspondingly, a control PROM being provided which is responsive to the counter state set into the input counter for facilitating the accessing of a track of the said device into which the incoming data is required to be stored to the sampling means, such that an empty store location within the said device on the appropriate track is identified.

6. A data recorder as claimed in claim 7, wherein the control PROM is arranfed to be fed with control signals to provide for mode selection.

7. A data recorder substantially as hereinbefore described with reference to the drawings accompanying the Provisional Specification.