GB1531632A - Phase-locked loop arrangements - Google Patents
Phase-locked loop arrangementsInfo
- Publication number
- GB1531632A GB1531632A GB2239576A GB2239576A GB1531632A GB 1531632 A GB1531632 A GB 1531632A GB 2239576 A GB2239576 A GB 2239576A GB 2239576 A GB2239576 A GB 2239576A GB 1531632 A GB1531632 A GB 1531632A
- Authority
- GB
- United Kingdom
- Prior art keywords
- loop
- locked
- phase
- locked loop
- oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 abstract 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 238000013016 damping Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
1531632 Automatic phase control WESTINGHOUSE BRAKE & SIGNAL CO Ltd 12 April 1977 [28 May 1976] 22395/76 Heading H3A A phase locked loop arrangement is given a wide path in range with high stability when locked by providing: a first loop 11, 14, 15 in which an oscillator 14 is locked to a reference signal 12 and including a capacitor 31 giving only small damping in the loop; and a second loop 22, 23 in which a second oscillator 23 is locked to the first the overall circuit being heavily damped by a coupling path from the first loop to the second which includes integrator 32 and capacitor 35.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2239576A GB1531632A (en) | 1976-05-28 | 1976-05-28 | Phase-locked loop arrangements |
AU24096/77A AU2409677A (en) | 1976-05-28 | 1977-04-07 | Phase-locked loop arrangements |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2239576A GB1531632A (en) | 1976-05-28 | 1976-05-28 | Phase-locked loop arrangements |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1531632A true GB1531632A (en) | 1978-11-08 |
Family
ID=10178676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2239576A Expired GB1531632A (en) | 1976-05-28 | 1976-05-28 | Phase-locked loop arrangements |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2409677A (en) |
GB (1) | GB1531632A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2513041A1 (en) * | 1981-09-15 | 1983-03-18 | Thomson Csf Mat Tel | PLL varicap diode piezoelectric oscillator - has digital frequency divider feeding phase comparator supplied with reference to select correction speed |
GB2138227A (en) * | 1983-04-12 | 1984-10-17 | Sony Corp | Digital video tape recorder apparatus |
EP0453253A2 (en) * | 1990-04-20 | 1991-10-23 | International Business Machines Corporation | Timing signal generator for signal processing system |
US5206769A (en) * | 1990-04-20 | 1993-04-27 | International Business Machines Corporation | Method for controlling a plurality of phase-lock loops from a common frequency control |
EP0690581A3 (en) * | 1994-07-01 | 1996-08-07 | Siemens Ag | Frequency control circuit of a clock generator |
WO1998010519A1 (en) * | 1996-09-04 | 1998-03-12 | Siemens Aktiengesellschaft | Low-jitter phase-locking loop |
WO2000018008A2 (en) * | 1998-09-17 | 2000-03-30 | Infineon Technologies Ag | Circuit for recovering a data signal and regenerating a clock signal |
WO2001011781A1 (en) * | 1999-08-05 | 2001-02-15 | Philips Semiconductors Inc. | Clock synchronization system and method |
-
1976
- 1976-05-28 GB GB2239576A patent/GB1531632A/en not_active Expired
-
1977
- 1977-04-07 AU AU24096/77A patent/AU2409677A/en not_active Expired
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2513041A1 (en) * | 1981-09-15 | 1983-03-18 | Thomson Csf Mat Tel | PLL varicap diode piezoelectric oscillator - has digital frequency divider feeding phase comparator supplied with reference to select correction speed |
GB2138227A (en) * | 1983-04-12 | 1984-10-17 | Sony Corp | Digital video tape recorder apparatus |
EP0122752A2 (en) * | 1983-04-12 | 1984-10-24 | Sony Corporation | Digital video tape recorder apparatus |
EP0122752A3 (en) * | 1983-04-12 | 1986-11-20 | Sony Corporation | Digital video tape recorder apparatus |
US5206769A (en) * | 1990-04-20 | 1993-04-27 | International Business Machines Corporation | Method for controlling a plurality of phase-lock loops from a common frequency control |
EP0453253A3 (en) * | 1990-04-20 | 1993-01-13 | International Business Machines Corporation | Timing signal generator for signal processing system |
EP0453253A2 (en) * | 1990-04-20 | 1991-10-23 | International Business Machines Corporation | Timing signal generator for signal processing system |
EP0690581A3 (en) * | 1994-07-01 | 1996-08-07 | Siemens Ag | Frequency control circuit of a clock generator |
CN1065693C (en) * | 1994-07-01 | 2001-05-09 | 西门子公司 | Frequency detecting and controlling circuits of clockgenerator |
WO1998010519A1 (en) * | 1996-09-04 | 1998-03-12 | Siemens Aktiengesellschaft | Low-jitter phase-locking loop |
WO2000018008A2 (en) * | 1998-09-17 | 2000-03-30 | Infineon Technologies Ag | Circuit for recovering a data signal and regenerating a clock signal |
WO2000018008A3 (en) * | 1998-09-17 | 2000-05-25 | Siemens Ag | Circuit for recovering a data signal and regenerating a clock signal |
US6433599B2 (en) | 1998-09-17 | 2002-08-13 | Infineon Technologies Ag | Circuit for data signal recovery and clock signal regeneration |
WO2001011781A1 (en) * | 1999-08-05 | 2001-02-15 | Philips Semiconductors Inc. | Clock synchronization system and method |
US6636575B1 (en) | 1999-08-05 | 2003-10-21 | Koninklijke Philips Electronics N.V. | Cascading PLL units for achieving rapid synchronization between digital communications systems |
Also Published As
Publication number | Publication date |
---|---|
AU2409677A (en) | 1978-10-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |