GB1518953A - Charge coupled dircuit arrangements and devices - Google Patents

Abstract

1518953 Charge coupled devices MULLARD Ltd 5 Sept 1975 36701/75 Heading H1K In a CCD comprising a region of one conductivity type in which charge carriers can be stored and transported signal information is converted into an input of charge carriers into a storage region immediately ahead of the first transfer electrode by the punch through of a depletion region, the extent of which is controlled by voltage on an input gate electrode, to a rectifying barrier bounding a further region in the body constituting a source of said charge carriers. Two groups of embodiments are described respectively employing surface transfer to minority carriers and transfer of majority carriers along a buried channel. In the first of these, designed as described for two phase operation, unidirectional transfer is ensured by provision of heavily doped ion-implanted inclusions of the same conductivity type as the transfer channel beneath the leading edges of the transfer electrodes. In one form the channel is formed on a substrate of the opposite conductivity type acting as the source region, and, to permit non-destructive read-out of charge, alternate transfer electrodes may optionally each be of annular form and constitute the gate of a deep depletion FET with a central drain electrode and a source constituted by the bulk of the channel region, the charge stored under the transfer electrode determining the conductance of the FET channel. In the other form the depletion region extends through a more heavily doped portion of the channel region, formed with the inclusions, to reach an implanted buried source region of the opposite type having an upward extension to a contact on the surface. A similar structure is present in one version (Fig. 6) of a three-phase buried channel embodiment but in this case punch through is between source region 37 and the buried channel region at the point where the extent of the depletion region associated with the reverse based channel isolating junction 39 is controlled by the voltage on the input gate 36. In the other version the source region is a surface region laterally spaced from the leading edge of the channel region. In all cases the input is in the form of square pulses, synchronized with the clock voltages and in antiphase with that applied to the first transfer electrode, superimposed on a direct voltage just less than the punch through voltage, to give a stored charge which is noise insensitive and varies linearly with the input voltage amplitude.