GB1452932A - Bubble switching system - Google Patents

Bubble switching system

Info

Publication number
GB1452932A
GB1452932A GB5232175A GB5232175A GB1452932A GB 1452932 A GB1452932 A GB 1452932A GB 5232175 A GB5232175 A GB 5232175A GB 5232175 A GB5232175 A GB 5232175A GB 1452932 A GB1452932 A GB 1452932A
Authority
GB
United Kingdom
Prior art keywords
bubbles
path
bubble
transferred
stable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5232175A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Monsanto Co
Original Assignee
Monsanto Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Monsanto Co filed Critical Monsanto Co
Priority claimed from GB5531673A external-priority patent/GB1452931A/en
Publication of GB1452932A publication Critical patent/GB1452932A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/007—Digital input from or digital output to memories of the shift register type
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/0875—Organisation of a plurality of magnetic shift registers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
    • H03K19/168—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices using thin-film devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Thin Magnetic Films (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)
  • Particle Accelerators (AREA)

Abstract

1452932 Magnetic storage arrangements MONSANTO CO 29 Nov 1973 [1 Dec 1972] 52321/75 Divided out of 1452931 Heading H3B A magnetic bubble switching arrangement includes a bi-stable circuit which in one state provides a series of bubbles and in the other state provides no bubbles. The presence of bubbles from the bi-stable causes bubbles only on a first path to be transferred to a third path, whereas the absence of bubbles from the bi-stable causes bubbles only on a second path to be transferred to the third path. In the absence of a bubble in delay loop 52 of the bi-stable a bubble on input d is transferred via field 50 and circulates via loop 52 and field 48, providing bubbles on track 56 which causes bubbles on the first path 60 to be annihilated at 64 and bubbles on the second path 66 to be transferred to the third path 72. If a further bubble now arrives at d the bubble in loop 52 no longer circulates and is annihilated at 54. The resulting absence of bubbles on track 56 allows bubbles on path 66 to pass to annihilator 70 and bubbles on path 60 to pass to path 72. The arrangement is used as a fetch-execute control in the bubble computer described in Specification 1,452,931.
GB5232175A 1972-12-01 1973-11-29 Bubble switching system Expired GB1452932A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US31140172A 1972-12-01 1972-12-01
GB5531673A GB1452931A (en) 1972-12-01 1973-11-29 Magnetic bubble circuit system

Publications (1)

Publication Number Publication Date
GB1452932A true GB1452932A (en) 1976-10-20

Family

ID=26267539

Family Applications (3)

Application Number Title Priority Date Filing Date
GB5232175A Expired GB1452932A (en) 1972-12-01 1973-11-29 Bubble switching system
GB5232375A Expired GB1452934A (en) 1972-12-01 1973-11-29 Magnetic bubble multiplying circuit
GB5232275A Expired GB1452933A (en) 1972-12-01 1973-11-29 Shift register

Family Applications After (2)

Application Number Title Priority Date Filing Date
GB5232375A Expired GB1452934A (en) 1972-12-01 1973-11-29 Magnetic bubble multiplying circuit
GB5232275A Expired GB1452933A (en) 1972-12-01 1973-11-29 Shift register

Country Status (1)

Country Link
GB (3) GB1452932A (en)

Also Published As

Publication number Publication date
GB1452934A (en) 1976-10-20
GB1452933A (en) 1976-10-20

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee