GB1406549A - Circuit arrangement for the determination of zones of high event density - Google Patents

Circuit arrangement for the determination of zones of high event density

Info

Publication number
GB1406549A
GB1406549A GB4905873A GB4905873A GB1406549A GB 1406549 A GB1406549 A GB 1406549A GB 4905873 A GB4905873 A GB 4905873A GB 4905873 A GB4905873 A GB 4905873A GB 1406549 A GB1406549 A GB 1406549A
Authority
GB
United Kingdom
Prior art keywords
counter
hence
emitted
count
event
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4905873A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of GB1406549A publication Critical patent/GB1406549A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/17Burst error correction, e.g. error trapping, Fire codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

1406549 Digital transmission; error detection LICENTIA PATENT VERWALTUNGS GmbH 22 Oct 1973 [21 Oct 1972] 49058/73 Heading H4P A circuit for detecting high event density, i.e. number of correct or correctable characters with respect to a possible total comprises a shift register R1 receiving 1's representing an event of one type and 0's for an event of another, clocked by shift pulses not shown. Signals S1 are also applied to mod-2 adder 4 with output from R1, which when 0, signal S7=0 and counter 7 counts forward for each 1 entering R1 hence after N cycles counter 7 indicates number of 1's in R1. There are now three further possibilities :- a 1 enters R1 and a 0 is emitted hence counter 7 is incremented; a 1 or 0 is received and a corresponding 1 or 0 is emitted hence count in 7 remains static; a 0 is received and a 1 is emitted hence counter 7 is switched to backward counting and is reduced by 1. If the count in 7 exceeds a determined number d this is signalled to control line S12 by a unit 10 and counter 8 records the same count and decrements for each 1 on line S7. At zero, counter 8 signals unit 10 which changes signal S12 to 0. In an alternative arrangement, Fig. 2 (not shown), an additional gate (3) blocks for N pulses so that register R1 does not have to be cleared at the start; conversely additional gate (2) is blocked at the end of an operation. AND gate (2) may be alternatively connected to block signals S1.
GB4905873A 1972-10-21 1973-10-22 Circuit arrangement for the determination of zones of high event density Expired GB1406549A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722251677 DE2251677A1 (en) 1972-10-21 1972-10-21 CIRCUIT ARRANGEMENT FOR DETERMINING ZONES OF HIGH EVENT DENSITY

Publications (1)

Publication Number Publication Date
GB1406549A true GB1406549A (en) 1975-09-17

Family

ID=5859661

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4905873A Expired GB1406549A (en) 1972-10-21 1973-10-22 Circuit arrangement for the determination of zones of high event density

Country Status (5)

Country Link
DE (1) DE2251677A1 (en)
FR (1) FR2204089B1 (en)
GB (1) GB1406549A (en)
IT (1) IT995984B (en)
NL (1) NL7314454A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2625055B1 (en) * 1987-12-17 1993-09-24 Alcatel Thomson Faisceaux METHOD FOR DETECTION OF ERASURES AFFECTING A DIGITAL WIRELESS LINK AND RECEPTION CHAIN IMPLEMENTING SUCH A METHOD

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3114894A (en) * 1959-10-30 1963-12-17 Ibm Signaling system

Also Published As

Publication number Publication date
NL7314454A (en) 1974-04-23
FR2204089A1 (en) 1974-05-17
IT995984B (en) 1975-11-20
FR2204089B1 (en) 1977-05-27
DE2251677A1 (en) 1974-04-25

Similar Documents

Publication Publication Date Title
US3973242A (en) Digital receiver
GB1524019A (en) Sampled signal detector
US3909724A (en) Start bit detector and data strober for asynchronous receiver
GB1074514A (en) Improvements in or relating to telegraph receiving apparatus
GB1353836A (en) Method and system for averaging the count of signals received from a bidirectional signal source
GB1328163A (en) Error detecting apparatus
GB1476878A (en) Binary phase digital decoding system
GB1406549A (en) Circuit arrangement for the determination of zones of high event density
CA1078969A (en) Method and apparatus for transfer of asynchronously altering data words
GB1500998A (en) Digital recording systems
GB1589449A (en) Methods and apparatus for enhancing resolution in pulse analysis
GB1249536A (en) An adapter
GB993163A (en) Error detection system
GB1501562A (en) Signal detection apparatus
GB1272425A (en) Improvements in and relating to data processing systems
EP0573295A3 (en) Level detection circuit and automatic color control circuit
US4234883A (en) Noise adaptive correlator
GB1229068A (en)
GB1503949A (en) Word commencement detector for a data transmission system
GB1096450A (en) Improvements in or relating to data transmission
GB1369946A (en) Noise-muting device for telegraphy receivers
GB1189657A (en) Improvements relating to Frequency Modulation Receivers for Data Transmission.
SU1051541A1 (en) Device for detecting and localizing errors when transmitting information
SU907847A1 (en) Device for preventing fractionation of telegraph signals being received
SU1088143A2 (en) Device for detecting errors of bipolar signal

Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee