GB1379011A - Method of manufacturing semiconductor devices - Google Patents

Method of manufacturing semiconductor devices

Info

Publication number
GB1379011A
GB1379011A GB2009073A GB2009073A GB1379011A GB 1379011 A GB1379011 A GB 1379011A GB 2009073 A GB2009073 A GB 2009073A GB 2009073 A GB2009073 A GB 2009073A GB 1379011 A GB1379011 A GB 1379011A
Authority
GB
United Kingdom
Prior art keywords
platinum
wafer
diffused
nickel
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2009073A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of GB1379011A publication Critical patent/GB1379011A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/221—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities of killers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemically Coating (AREA)

Abstract

1379011 Semi-conductor devices MATSUSHITA ELECTRONICS CORP 27 April 1973 [2 May 1972] 20090/73 Heading H1K The manufacture of a semi-conductor device comprises coating one surface of a silicon body containing at least one PN junction with platinum, heating to adhere it to the silicon, plating nickel on the platinum and then heating to diffuse the platinum into the body. As described phosphorus is first diffused into opposed faces of an N type silicon wafer, residual oxide removed, the diffused layer lapped from one face and boron diffused into the opposite face to form a junction. After clearing away oxide the wafer is dipped in an aqueous solution of chloroplatinic acid and hydrofluoric acid to deposit the platinum and then heated at 700‹ C. for 5 to 10 minutes in an inert atmosphere. Electroless nickel is then deposited and the wafer reheated for 10-60 minutes at 800- 900‹ C. in inert gas. This improves the adhesion of the nickel which constitutes the ohmic contacts to the wafer and by reducing the carrier lifetime improves the switching characteristics of the device.
GB2009073A 1972-05-02 1973-04-27 Method of manufacturing semiconductor devices Expired GB1379011A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4414172A JPS5745061B2 (en) 1972-05-02 1972-05-02

Publications (1)

Publication Number Publication Date
GB1379011A true GB1379011A (en) 1975-01-02

Family

ID=12683347

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2009073A Expired GB1379011A (en) 1972-05-02 1973-04-27 Method of manufacturing semiconductor devices

Country Status (6)

Country Link
JP (1) JPS5745061B2 (en)
CA (1) CA980918A (en)
DE (1) DE2321390C3 (en)
FR (1) FR2183111B1 (en)
GB (1) GB1379011A (en)
IT (1) IT988158B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS591667A (en) * 1982-05-20 1984-01-07 ゼネラル・エレクトリツク・カンパニイ Platinum non-electrolytic plating process for silicon
JPS60182010A (en) * 1984-02-29 1985-09-17 Canon Electronics Inc Head device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL241982A (en) * 1958-08-13 1900-01-01
NL134170C (en) * 1963-12-17 1900-01-01
DE1213921B (en) * 1964-08-25 1966-04-07 Bosch Gmbh Robert Method for manufacturing a semiconductor device
DE1283970B (en) * 1966-03-19 1968-11-28 Siemens Ag Metallic contact on a semiconductor component
US3599054A (en) * 1968-11-22 1971-08-10 Bell Telephone Labor Inc Barrier layer devices and methods for their manufacture
US3640783A (en) * 1969-08-11 1972-02-08 Trw Semiconductors Inc Semiconductor devices with diffused platinum

Also Published As

Publication number Publication date
DE2321390A1 (en) 1973-11-15
FR2183111A1 (en) 1973-12-14
DE2321390B2 (en) 1976-10-28
DE2321390C3 (en) 1982-07-08
CA980918A (en) 1975-12-30
JPS495575A (en) 1974-01-18
JPS5745061B2 (en) 1982-09-25
IT988158B (en) 1975-04-10
FR2183111B1 (en) 1976-11-12

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Legal Events

Date Code Title Description
PS Patent sealed
746 Register noted 'licences of right' (sect. 46/1977)
PE20 Patent expired after termination of 20 years

Effective date: 19930426