GB1372459A - Method of producing metal patterns - Google Patents

Method of producing metal patterns

Info

Publication number
GB1372459A
GB1372459A GB5801272A GB5801272A GB1372459A GB 1372459 A GB1372459 A GB 1372459A GB 5801272 A GB5801272 A GB 5801272A GB 5801272 A GB5801272 A GB 5801272A GB 1372459 A GB1372459 A GB 1372459A
Authority
GB
United Kingdom
Prior art keywords
metal patterns
producing metal
dec
applying
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5801272A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Electronics UK Ltd
Original Assignee
Philips Electronic and Associated Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronic and Associated Industries Ltd filed Critical Philips Electronic and Associated Industries Ltd
Publication of GB1372459A publication Critical patent/GB1372459A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • H05K3/048Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00Electric solid-state thin-film or thick-film devices, not otherwise provided for
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1372459 Coating with Pt PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 15 Dec 1972 [18 Dec 1971] 58012/72 Heading C7F A Pt pattern is formed on a substrate of e.g. Si by first applying a negative pattern of a material which will react physically or chemically with Pt, applying a Pt layer, heating and then removing the reacted parts of the Pt, e.g. ultrasonically or by etching e.g. in aqua regia. The material may be an element of Groups III, IV, and V of the Mendeleef Table, e.g. Al, Ge, or Si. A layer of Ti or Cr may be applied before the Pt. The layers may be vapour deposited. The Pt may be electroplated with Au.
GB5801272A 1971-12-18 1972-12-15 Method of producing metal patterns Expired GB1372459A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7117429A NL7117429A (en) 1971-12-18 1971-12-18

Publications (1)

Publication Number Publication Date
GB1372459A true GB1372459A (en) 1974-10-30

Family

ID=19814730

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5801272A Expired GB1372459A (en) 1971-12-18 1972-12-15 Method of producing metal patterns

Country Status (8)

Country Link
US (1) US3853613A (en)
JP (1) JPS5125225B2 (en)
CA (1) CA964384A (en)
DE (1) DE2261672A1 (en)
FR (1) FR2163609A1 (en)
GB (1) GB1372459A (en)
IT (1) IT976061B (en)
NL (1) NL7117429A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52153137U (en) * 1976-05-17 1977-11-19
JPS53157435U (en) * 1977-05-17 1978-12-09
JPS5950212B2 (en) * 1978-07-28 1984-12-07 富士電機株式会社 Method for manufacturing electrodes for semiconductor devices
JPS5679450A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Electrode and wiring of semiconductor device
US4442137A (en) * 1982-03-18 1984-04-10 International Business Machines Corporation Maskless coating of metallurgical features of a dielectric substrate
US11011381B2 (en) * 2018-07-27 2021-05-18 Texas Instruments Incorporated Patterning platinum by alloying and etching platinum alloy

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3686080A (en) * 1971-07-21 1972-08-22 Rca Corp Method of fabrication of semiconductor devices

Also Published As

Publication number Publication date
IT976061B (en) 1974-08-20
CA964384A (en) 1975-03-11
JPS5125225B2 (en) 1976-07-29
NL7117429A (en) 1973-06-20
US3853613A (en) 1974-12-10
DE2261672A1 (en) 1973-06-20
FR2163609A1 (en) 1973-07-27
JPS4868437A (en) 1973-09-18

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees