GB1360566A - Data processing systems - Google Patents

Data processing systems

Info

Publication number
GB1360566A
GB1360566A GB2881072A GB2881072A GB1360566A GB 1360566 A GB1360566 A GB 1360566A GB 2881072 A GB2881072 A GB 2881072A GB 2881072 A GB2881072 A GB 2881072A GB 1360566 A GB1360566 A GB 1360566A
Authority
GB
United Kingdom
Prior art keywords
event
store
register
bit
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2881072A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1360566A publication Critical patent/GB1360566A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3419—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3476—Data logging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/86—Event-based monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/865—Monitoring of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Debugging And Monitoring (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)

Abstract

1360566 Data processing systems INTERNATIONAL BUSINESS MACHINES CORP 20 June 1972 [28 June 1971] 28810/72 Heading G4A On request from a hardware or software source, the identity ID of an event and the time interval #T during which the event is expected to occur are entered in a register 10, the actual time from a clock 23 is added to #T at 17, the resulting future time is stored in a write register 16 together with the event ID, the contents of register 16 are transferred to a vacant slot in a store 19, and a comparison is made at 22 between the stored future times and the actual time from clock 23 to indicate when an event is overdue. The store 19 is described as being an array of FET's rows of which are accessed successively by a counter so as to act as a recirculating store. Clock 23 is advanced once for each cycle of the store 19. In addition to #T and ID the registers 10, 16 and store 19 include control bits having the following significance when on: H = hardware as opposed to software originating source; S = cancel as opposed to store request; B = register full; U = slot available; M = overdue event not yet acknowledged. When an overdue event is recognized at 22, the event ID and bit H are transferred to a register 25 for subsequent transfer to the originating source as indicated by the H bit. If register 25 is busy however, the M bit is set in the appropriate row of store 19. If an event occurs within the expected interval #T, the originating source enters a cancellation request (S = 1) in register 10. Successive comparisons are then made between the event ID of the request transferred to register 16 and the stored event ID 's, and when the corresponding slot in store 19 is found the U bit is turned on to indicate that the stored event data is no longer valid and the slot is available for storing another event. An associative store may be used in place of the recirculating store 19.
GB2881072A 1971-06-28 1972-06-20 Data processing systems Expired GB1360566A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15713471A 1971-06-28 1971-06-28

Publications (1)

Publication Number Publication Date
GB1360566A true GB1360566A (en) 1974-07-17

Family

ID=22562456

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2881072A Expired GB1360566A (en) 1971-06-28 1972-06-20 Data processing systems

Country Status (5)

Country Link
US (1) US3723975A (en)
JP (1) JPS5244495B1 (en)
DE (1) DE2230119C2 (en)
FR (1) FR2144222A5 (en)
GB (1) GB1360566A (en)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810120A (en) * 1971-02-12 1974-05-07 Honeywell Inf Systems Automatic deactivation device
US4099235A (en) * 1972-02-08 1978-07-04 Siemens Aktiengesellschaft Method of operating a data processing system
US3996567A (en) * 1972-05-23 1976-12-07 Telefonaktiebolaget L M Ericsson Apparatus for indicating abnormal program execution in a process controlling computer operating in real time on different priority levels
US3909795A (en) * 1973-08-31 1975-09-30 Gte Automatic Electric Lab Inc Program timing circuitry for central data processor of digital communications system
US3969703A (en) * 1973-10-19 1976-07-13 Ball Corporation Programmable automatic controller
FR2253432A5 (en) * 1973-11-30 1975-06-27 Honeywell Bull Soc Ind
US3984815A (en) * 1975-05-02 1976-10-05 Sperry Rand Corporation Time of event recorder
US4099255A (en) * 1976-12-10 1978-07-04 Honeywell Information Systems Inc. Interrupt apparatus for enabling interrupt service in response to time out conditions
US4131945A (en) * 1977-01-10 1978-12-26 Xerox Corporation Watch dog timer module for a controller
US4181849A (en) * 1978-01-30 1980-01-01 General Signal Corporation Vital relay driver having controlled response time
USRE30986E (en) * 1978-01-30 1982-06-29 General Signal Corporation Vital relay driver having controlled response time
US4247317A (en) * 1978-04-20 1981-01-27 Ball Corporation Glassware forming machine computer-ram controller system
US4213178A (en) * 1978-10-23 1980-07-15 International Business Machines Corporation Input/output command timing mechanism
JPS5557956A (en) * 1978-10-25 1980-04-30 Nissan Motor Co Ltd Malfunction prevention unit of microcomputer
US4262331A (en) * 1978-10-30 1981-04-14 Ibm Corporation Self-adaptive computer load control
CH638043A5 (en) * 1979-07-20 1983-08-31 Landis & Gyr Ag Arrangement for the central measurement of the thermal energy drawn by a plurality of heat consumers
US4472789A (en) * 1979-11-09 1984-09-18 General Signal Corporation Vital timer
US4982404A (en) * 1988-10-12 1991-01-01 American Standard Inc. Method and apparatus for insuring operation of a multiple part system controller
JP2674809B2 (en) * 1988-11-07 1997-11-12 日本電気株式会社 Information processing device
US5581794A (en) * 1992-12-18 1996-12-03 Amdahl Corporation Apparatus for generating a channel time-out signal after 16.38 milliseconds
US6279069B1 (en) * 1996-12-26 2001-08-21 Intel Corporation Interface for flash EEPROM memory arrays
DE19707454A1 (en) * 1997-02-25 1998-08-27 Bosch Gmbh Robert Process and signal processing processor with control of the processing time
US5991708A (en) * 1997-07-07 1999-11-23 International Business Machines Corporation Performance monitor and method for performance monitoring within a data processing system
EP1383047A1 (en) * 2002-07-18 2004-01-21 Cp8 Method for the secure execution of a program against attacks by radiation or other means
DE102005008975A1 (en) * 2005-02-28 2006-08-31 Robert Bosch Gmbh Processor system monitoring method, involves newly starting cyclic permutation of two timers, if one of processes is started, and displaying error signal, if time interval detected by timer exceeds pre-determined maximum time interval
CN112069025B (en) * 2020-08-25 2024-02-23 北京五八信息技术有限公司 Lock expiration event processing method and device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL137733C (en) * 1963-12-31
US3312951A (en) * 1964-05-29 1967-04-04 North American Aviation Inc Multiple computer system with program interrupt
US3408629A (en) * 1966-01-10 1968-10-29 Nielsen A C Co Data handling system
US3518633A (en) * 1968-02-07 1970-06-30 Rca Corp Weighted time accounting in time shared computer
US3618042A (en) * 1968-11-01 1971-11-02 Hitachi Ltd Error detection and instruction reexecution device in a data-processing apparatus
US3566368A (en) * 1969-04-22 1971-02-23 Us Army Delta clock and interrupt logic

Also Published As

Publication number Publication date
US3723975A (en) 1973-03-27
DE2230119C2 (en) 1987-07-09
DE2230119A1 (en) 1973-01-25
FR2144222A5 (en) 1973-02-09
JPS5244495B1 (en) 1977-11-08

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee