GB1357225A - Digital function generator - Google Patents

Digital function generator

Info

Publication number
GB1357225A
GB1357225A GB2943171A GB2943171A GB1357225A GB 1357225 A GB1357225 A GB 1357225A GB 2943171 A GB2943171 A GB 2943171A GB 2943171 A GB2943171 A GB 2943171A GB 1357225 A GB1357225 A GB 1357225A
Authority
GB
United Kingdom
Prior art keywords
counter
pulses
gate
receiving
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2943171A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chandler Evans Inc
Original Assignee
Chandler Evans Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chandler Evans Inc filed Critical Chandler Evans Inc
Publication of GB1357225A publication Critical patent/GB1357225A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/07—Programme control other than numerical control, i.e. in sequence controllers or logic controllers where the programme is defined in the fixed connection of electrical elements, e.g. potentiometers, counters, transistors
    • G05B19/075—Programme control other than numerical control, i.e. in sequence controllers or logic controllers where the programme is defined in the fixed connection of electrical elements, e.g. potentiometers, counters, transistors for delivering a step function, a slope or a continuous function

Abstract

1357225 Digital function generators CHANDLER EVANS Inc 23 June 1971 [26 June 1970] 29431/71 Heading G4H The division rate of a frequency divider 12 (Fig. 3) receiving pulses f i is varied in dependence on the count in a counter 10 also receiving the pulses. As described a duration signal representing a variable enables a gate 20 so that clock pulses are fed to the counter 10 and divider 12. Selected counter outputs are connected to NAND gates 30, 32, 34, 36 which enable AND gates 54, 56, 58, 60 in the divider. The other inputs to the AND gates are connected to astable multivibrators 40, 48, 50, 52 receiving the pulses f; after division by 1, 2, 4 and 8 respectively, all the outputs of the AND gate being connected via an OR gate 62 to a counter. In the embodiment of Fig. 4 (not shown) the lowest stages of the counter operate as the frequency divider. The apparatus may be used for controlling the fuel supply to gas turbine engines.
GB2943171A 1970-06-26 1971-06-23 Digital function generator Expired GB1357225A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5021270A 1970-06-26 1970-06-26

Publications (1)

Publication Number Publication Date
GB1357225A true GB1357225A (en) 1974-06-19

Family

ID=21963975

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2943171A Expired GB1357225A (en) 1970-06-26 1971-06-23 Digital function generator

Country Status (4)

Country Link
US (1) US3651317A (en)
CA (1) CA925214A (en)
DE (1) DE2125092A1 (en)
GB (1) GB1357225A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3740539A (en) * 1972-02-28 1973-06-19 Tektronix Inc Programmable function generator
US3935440A (en) * 1975-01-30 1976-01-27 The United States Of America As Represented By The Secretary Of The Navy Catapult breakaway load simulator circuit
FR2576470B1 (en) * 1985-01-22 1989-05-26 Veglia VARIABLE OUTPUT FREQUENCY-FREQUENCY CONVERTER
JP3708093B2 (en) * 2003-04-01 2005-10-19 ミネベア株式会社 R / D converter used for motor servo control system and motor speed control
US7382301B2 (en) * 2003-10-31 2008-06-03 International Rectifier Corporation Method and apparatus for converting PWM signal to analog output voltage
US7855669B2 (en) 2008-09-26 2010-12-21 Silicon Laboratories, Inc. Circuit device to generate a high precision control signal

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2910237A (en) * 1952-12-05 1959-10-27 Lab For Electronics Inc Pulse rate multipler
US3126476A (en) * 1959-03-31 1964-03-24 Binary rate multiplier
US3184663A (en) * 1960-07-25 1965-05-18 Warner Swasey Co Plural pulse responsive motor synchronizing control system with uniform pulse spacing
US3052412A (en) * 1961-01-26 1962-09-04 Ibm Multiplier circuit
US3230353A (en) * 1962-10-16 1966-01-18 Air Reduction Pulse rate multiplier
US3414720A (en) * 1964-04-27 1968-12-03 Lab For Electronics Inc Pulse rate multiplier
US3456098A (en) * 1966-04-04 1969-07-15 Bell Telephone Labor Inc Serial binary multiplier arrangement

Also Published As

Publication number Publication date
CA925214A (en) 1973-04-24
DE2125092A1 (en) 1971-12-30
US3651317A (en) 1972-03-21

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees