GB1346854A - Data-processing apparatus - Google Patents

Data-processing apparatus

Info

Publication number
GB1346854A
GB1346854A GB1699871A GB1699871A GB1346854A GB 1346854 A GB1346854 A GB 1346854A GB 1699871 A GB1699871 A GB 1699871A GB 1699871 A GB1699871 A GB 1699871A GB 1346854 A GB1346854 A GB 1346854A
Authority
GB
United Kingdom
Prior art keywords
waveform
pulses
data
data stream
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1699871A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of GB1346854A publication Critical patent/GB1346854A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Magnetic Recording (AREA)
GB1699871A 1970-06-19 1971-05-25 Data-processing apparatus Expired GB1346854A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US4769670A 1970-06-19 1970-06-19

Publications (1)

Publication Number Publication Date
GB1346854A true GB1346854A (en) 1974-02-13

Family

ID=21950426

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1699871A Expired GB1346854A (en) 1970-06-19 1971-05-25 Data-processing apparatus

Country Status (6)

Country Link
US (1) US3624521A (enExample)
JP (1) JPS556244B1 (enExample)
CA (1) CA945675A (enExample)
DE (1) DE2130372C2 (enExample)
FR (1) FR2095373B1 (enExample)
GB (1) GB1346854A (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753143A (en) * 1971-08-05 1973-08-14 Honeywell Inf Systems Phase locked oscillator for integer pulse rates
US3749889A (en) * 1971-08-19 1973-07-31 Interface Ind Inc Reader apparatus for reading record materials at speeds which are independent of recording speeds
US3753142A (en) * 1972-06-12 1973-08-14 Logimetrics Inc Signal generators employing digital phase locked loops and compensating circuits
US4059812A (en) * 1976-11-22 1977-11-22 Control Data Corporation Synchronous pulse generator including flywheel tank circuit with phase locked loop
CA1207845A (en) * 1984-07-23 1986-07-15 Leslie M. Koskinen Adaptively tuned clock recovery circuit
IT1185412B (it) * 1985-10-10 1987-11-12 Honeywell Inf Systems Tseparatore digitale di dati
US5192915A (en) * 1991-06-19 1993-03-09 Tektronix, Inc. Edge integrating phase detector

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3328719A (en) * 1965-08-24 1967-06-27 Sylvania Electric Prod Phase-lock loop with adaptive bandwidth
US3518554A (en) * 1967-05-22 1970-06-30 Honeywell Inc Detection of double transition recording
US3510786A (en) * 1967-07-17 1970-05-05 Ibm Synchronizing circuit compensating for data bit shift
US3488605A (en) * 1968-05-15 1970-01-06 Slant Fin Corp Oscillator with digital counter frequency control circuits

Also Published As

Publication number Publication date
US3624521A (en) 1971-11-30
FR2095373B1 (enExample) 1973-06-29
FR2095373A1 (enExample) 1972-02-11
DE2130372A1 (de) 1971-12-23
DE2130372C2 (de) 1984-06-07
JPS556244B1 (enExample) 1980-02-14
CA945675A (en) 1974-04-16

Similar Documents

Publication Publication Date Title
US4055814A (en) Phase locked loop for synchronizing VCO with digital data pulses
US4085288A (en) Phase locked loop decoder
US3281806A (en) Pulse width modulation representation of paired binary digits
US4215430A (en) Fast synchronization circuit for phase locked looped decoder
US3944940A (en) Versatile phase-locked loop for read data recovery
GB1565245A (en) Data recovery apparatus
EP0010959A1 (en) Phase lock loop
GB1319358A (en) Magnetic recording systems
KR860001257B1 (ko) 데이타 독출회로
GB1346854A (en) Data-processing apparatus
CA1317671C (en) Phase discrimination and data separation method and apparatus
US3864529A (en) Receiver for decoding duobinary signals
EP0158219B1 (en) Sync responsive clock generator for digital demodulators
US3727005A (en) Delta modulation system with randomly timed multiplexing capability
US4520408A (en) Clock signal synchronization apparatus and method for decoding self-clocking encoded data
US3361978A (en) Split-phase code modulation synchonizer and translator
ES414591A1 (es) Un sistema de sincronizacion de cuadro.
US4743857A (en) Digital/analog phase-locked oscillator
US3500385A (en) Coded data storage and retrieval system
GB1427119A (en) Clock and sector mark generator for rotating storage units
US3656149A (en) Three frequency data separator
US3879752A (en) Combined sector pulse and data detection system
EP0094956B1 (en) A method of bringing an oscillator into phase with an incoming signal and an apparatus for carrying out the method
US3206681A (en) Pulse code detecting systems
US3380042A (en) Digital telemetry system

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee