GB1334528A - Data processing systems - Google Patents

Abstract

1334528 Data processing HONEYWELL INFORMATION SYSTEMS Inc 3 Nov 1970 [12 Nov 1969] 52302/70 Heading G4A A data processing system has I/O control means for checking the validity of peripheral device selection. In a multiprogram system, a master program establishes and maintains certain tables which associate the different programs with their files or peripheral devices. The I/O operations of the programs are processed concurrently through the different program instructions and may be executed concurrently or sequentially. A peripheral control instruction PCO identifies the key of a program, a peripheral device specified by the program, and a g code referencing the separate programs. When a PCO is detected, a hardware trap is enabled which transfers control of the program to the master program. The g code combined with a first table address portion specifies an entry in a first table, which entry gives an address portion in one of g second tables. The second table address portion is combined with peripheral device designating data to give another address in the second table. A lock code is obtained from the latter second table address, which code is compared with the program key. If they agree the I/O operation is valid and control is transferred to the master program. If not, a branch is made to diagnostic routine. The function 100 is implemented in two embodiments. In Fig. 8 (not shown) all the opcodes are translated into ROM addresses where the ROM contains a microprogram defining the function. The PCO Opcode causes the reading of a micro-subroutine which results in the trapping to the master program in 110. In Fig. 9 (not shown) special decoder logic forces the trap. The validity of the users' read-write counter selection is also checked. Disc files, shifting, interrupt, hexadecimal notation and multiplication are also mentioned.