GB1333610A - Methods of manufacturing semiconductor devices with a multilayer wiring structure - Google Patents

Methods of manufacturing semiconductor devices with a multilayer wiring structure

Info

Publication number
GB1333610A
GB1333610A GB6130070A GB6130070A GB1333610A GB 1333610 A GB1333610 A GB 1333610A GB 6130070 A GB6130070 A GB 6130070A GB 6130070 A GB6130070 A GB 6130070A GB 1333610 A GB1333610 A GB 1333610A
Authority
GB
United Kingdom
Prior art keywords
film
reduction
mixed film
deposited
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB6130070A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of GB1333610A publication Critical patent/GB1333610A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/412—Deposition of metallic or metal-silicide materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/065—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by making at least a portion of the conductive part non-conductive, e.g. by oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/945—Special, e.g. metal

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
GB6130070A 1969-12-25 1970-12-23 Methods of manufacturing semiconductor devices with a multilayer wiring structure Expired GB1333610A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP45001690A JPS4913914B1 (https=) 1969-12-25 1969-12-25

Publications (1)

Publication Number Publication Date
GB1333610A true GB1333610A (en) 1973-10-10

Family

ID=11508499

Family Applications (1)

Application Number Title Priority Date Filing Date
GB6130070A Expired GB1333610A (en) 1969-12-25 1970-12-23 Methods of manufacturing semiconductor devices with a multilayer wiring structure

Country Status (4)

Country Link
US (1) US3737340A (https=)
JP (1) JPS4913914B1 (https=)
GB (1) GB1333610A (https=)
NL (1) NL147884B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10223359B4 (de) * 2002-05-25 2011-08-11 Robert Bosch GmbH, 70469 Mikromechanisches Bauteil und Verfahren zur Herstellung einer Anti-Haftschicht auf einem mikromechanischen Bauteil

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4001870A (en) * 1972-08-18 1977-01-04 Hitachi, Ltd. Isolating protective film for semiconductor devices and method for making the same
US4005240A (en) * 1975-03-10 1977-01-25 Aeronutronic Ford Corporation Germanium device passivation
US4115799A (en) * 1977-01-26 1978-09-19 Westinghouse Electric Corp. Thin film copper transition between aluminum and indium copper films
JPS5678130A (en) * 1979-11-30 1981-06-26 Hitachi Ltd Semiconductor device and its manufacture
ATE53709T1 (de) * 1984-06-19 1990-06-15 Siemens Ag In c-mos-technik realisierte basiszelle.
US4622576A (en) * 1984-10-22 1986-11-11 National Semiconductor Corporation Conductive non-metallic self-passivating non-corrodable IC bonding pads
US5055423A (en) * 1987-12-28 1991-10-08 Texas Instruments Incorporated Planarized selective tungsten metallization system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10223359B4 (de) * 2002-05-25 2011-08-11 Robert Bosch GmbH, 70469 Mikromechanisches Bauteil und Verfahren zur Herstellung einer Anti-Haftschicht auf einem mikromechanischen Bauteil

Also Published As

Publication number Publication date
DE2061209A1 (de) 1971-07-08
US3737340A (en) 1973-06-05
NL147884B (nl) 1975-11-17
NL7018740A (https=) 1971-06-29
JPS4913914B1 (https=) 1974-04-03
DE2061209B2 (de) 1972-07-27

Similar Documents

Publication Publication Date Title
US3381182A (en) Microcircuits having buried conductive layers
US3946426A (en) Interconnect system for integrated circuits
GB1567808A (en) Semiconductor devices and method of manufacturing the same
US3577038A (en) Semiconductor devices
US4125426A (en) Method of manufacturing semiconductor device
US4545115A (en) Method and apparatus for making ohmic and/or Schottky barrier contacts to semiconductor substrates
JPS584924A (ja) 半導体装置の電極形成方法
GB1147599A (en) Method for fabricating semiconductor devices in integrated circuits
JPH0519819B2 (https=)
GB1236401A (en) Improvements relating to semiconductor structures and fabrication thereof
GB1222898A (en) Improvements in and relating to methods of manufacturing semiconductor devices
JPS60138918A (ja) 半導体装置の製造方法
JPH03222367A (ja) 絶縁ゲート型電界効果トランジスタ
GB1333610A (en) Methods of manufacturing semiconductor devices with a multilayer wiring structure
US3849270A (en) Process of manufacturing semiconductor devices
US3562040A (en) Method of uniformally and rapidly etching nichrome
US4081896A (en) Method of making a substrate contact for an integrated circuit
US3431636A (en) Method of making diffused semiconductor devices
US3359467A (en) Resistors for integrated circuits
US3474304A (en) Monolithic thin-film devices with active and resistive regions
US4380115A (en) Method of making a semiconductor device with a seal
US3746944A (en) Contact members for silicon semiconductor devices
US3367806A (en) Method of etching a graded metallic film
US3573974A (en) Method of fabricating ohmic contacts and conductive connectors
CA1070853A (en) Seal for a semiconductor device and method therefor

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee