GB1316167A - Encapsulation of semiconductor devices - Google Patents
Encapsulation of semiconductor devicesInfo
- Publication number
- GB1316167A GB1316167A GB1316167DA GB1316167A GB 1316167 A GB1316167 A GB 1316167A GB 1316167D A GB1316167D A GB 1316167DA GB 1316167 A GB1316167 A GB 1316167A
- Authority
- GB
- United Kingdom
- Prior art keywords
- substrate
- devices
- cover
- plate
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
Abstract
1316167 Semi-conductor devices FERRANTI Ltd 13 Dec 1971 [17 Dec 1970] 60332/70 Heading H1K One or more semi-conductor devices 12 core mounted on a substrate 33, e.g. using the beam-lead technique or in the flip-chip configuration shown, with the device electrodes contacting conductors 14 on the substrate surface, the leads 171 of a lead frame are bonded to the conductors 14 and to the substrate 33, and a cover-plate 44 is secured to the substrate 33 using an adhesive 43 such as silicone rubber, optionally filled with alumina or silica, thereby hermetically sealing the devices 12. A metered quantity of the adhesive 43 is supplied, sufficient to completely fill the space between the substrate 33 and cover-plate 44. For use with Si devices 12 both the substrate 33 and cover-plate 44 may be made of a glass or ceramic material having a similar thermal coefficient of expansion to that of Si. The leads 17<SP>1</SP> may be cranked as shown or may extend straight outwardly from the upper surface of the substrate 33. A plurality of such assemblies may be stacked together with corresponding leads interconnected by wires extending parallel to the axis of the stack.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB6033270 | 1970-12-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1316167A true GB1316167A (en) | 1973-05-09 |
Family
ID=10485444
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1316167D Expired GB1316167A (en) | 1970-12-17 | 1970-12-17 | Encapsulation of semiconductor devices |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1316167A (en) |
-
1970
- 1970-12-17 GB GB1316167D patent/GB1316167A/en not_active Expired
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |