GB1311010A - Analogue-digital conversion - Google Patents

Analogue-digital conversion

Info

Publication number
GB1311010A
GB1311010A GB591670*[A GB591670A GB1311010A GB 1311010 A GB1311010 A GB 1311010A GB 591670 A GB591670 A GB 591670A GB 1311010 A GB1311010 A GB 1311010A
Authority
GB
United Kingdom
Prior art keywords
integrator
linearly
dec
counter
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB591670*[A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1311010A publication Critical patent/GB1311010A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/50Analogue/digital converters with intermediate conversion to time interval

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

1311010 A/D converters SIEMENS AG 11 Dec 1970 [13 Dec 1969] 59161/70 Heading G4H In a non-linear dual ramp A/D converter, the integrating member is charged or discharged by a time-varying signal. A squareroot relation between digital output and analogue input is obtained by applying the analogue input Ux to a Miller integrator R1, V1, C1 for a period determined by a counter Z and clock source T to charge capacitor C1 linearly and then applying a constant reference voltage Uc to a second integrator R3, V2, C2 to apply a linearly increasing voltage to the first integrator over resistor R2 and discharge C1 at a rate which increases linearly with time. Counter Z is stopped when the voltage across C1 reaches zero.
GB591670*[A 1969-12-13 1970-12-11 Analogue-digital conversion Expired GB1311010A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691962697 DE1962697A1 (en) 1969-12-13 1969-12-13 Method for non-linear analog-digital conversion

Publications (1)

Publication Number Publication Date
GB1311010A true GB1311010A (en) 1973-03-21

Family

ID=5753850

Family Applications (1)

Application Number Title Priority Date Filing Date
GB591670*[A Expired GB1311010A (en) 1969-12-13 1970-12-11 Analogue-digital conversion

Country Status (4)

Country Link
DE (1) DE1962697A1 (en)
FR (1) FR2070843B3 (en)
GB (1) GB1311010A (en)
NL (1) NL7015415A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59191929A (en) * 1983-04-15 1984-10-31 Canon Inc Compression type analog/digital converter

Also Published As

Publication number Publication date
DE1962697A1 (en) 1971-06-24
NL7015415A (en) 1971-06-15
FR2070843B3 (en) 1973-08-10
FR2070843A7 (en) 1971-09-17

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees