GB1274298A - Improvements in or relating to semiconductor devices - Google Patents

Improvements in or relating to semiconductor devices

Info

Publication number
GB1274298A
GB1274298A GB58527/69A GB5852769A GB1274298A GB 1274298 A GB1274298 A GB 1274298A GB 58527/69 A GB58527/69 A GB 58527/69A GB 5852769 A GB5852769 A GB 5852769A GB 1274298 A GB1274298 A GB 1274298A
Authority
GB
United Kingdom
Prior art keywords
wafer
region
layer
face
metallizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB58527/69A
Inventor
William Frederick Stacey
Gerald Herbert Swallow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Associated Electrical Industries Ltd
Original Assignee
Associated Electrical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Associated Electrical Industries Ltd filed Critical Associated Electrical Industries Ltd
Priority to GB58527/69A priority Critical patent/GB1274298A/en
Publication of GB1274298A publication Critical patent/GB1274298A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
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    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
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    • H01L2924/01013—Aluminum [Al]
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    • H01L2924/01014—Silicon [Si]
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    • H01L2924/01015—Phosphorus [P]
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    • H01L2924/01022—Titanium [Ti]
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    • H01L2924/01032—Germanium [Ge]
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    • H01L2924/01074—Tungsten [W]
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    • H01L2924/01079—Gold [Au]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20751—Diameter ranges larger or equal to 10 microns less than 20 microns
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance

Abstract

1,274,298. Semi-conductors. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. 1 Dec., 1970 [1 Dec., 1969], No. 58527/69. Heading H1K. In a microwave semi-conductor diode, a U- shaped ceramic carrier 1 is centrally grooved at 4, while the ends of limbs 2 and the inner faces are gold metallized at 5 in areas divided by the unmetallized groove. A s/c wafer 6 contains a PN junction whose N region is connected through the wafer face while the P region is connected through a gold layer 7 on the opposite face. The N face is bonded to metallizing 5 on the inner face of the carrier while the P region is connected over a thin gold wire to metallizing on the remote side of the groove, the opposed portions metallizing 5 contacting external conductors (not shown). In manufacture, an SiO 2 layer is deposited on N-type Ge wafer and centrally apertured for evaporation of Al, Ti and Au in order; after which the Au layer is removed by mask etching except for a circular region overlaying the aperture. The Au layer is electroplated up to a required thickness enabling it to function as a heat sink and the remaining AlTi layers are etched off. Al is diffused through the aperture to form a P-type region of the wafer, which is then mounted in the carrier. Plural such devices may be formed on a single wafer which is thereafter divided.
GB58527/69A 1969-12-01 1969-12-01 Improvements in or relating to semiconductor devices Expired GB1274298A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB58527/69A GB1274298A (en) 1969-12-01 1969-12-01 Improvements in or relating to semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB58527/69A GB1274298A (en) 1969-12-01 1969-12-01 Improvements in or relating to semiconductor devices

Publications (1)

Publication Number Publication Date
GB1274298A true GB1274298A (en) 1972-05-17

Family

ID=10481826

Family Applications (1)

Application Number Title Priority Date Filing Date
GB58527/69A Expired GB1274298A (en) 1969-12-01 1969-12-01 Improvements in or relating to semiconductor devices

Country Status (1)

Country Link
GB (1) GB1274298A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677876A (en) * 1984-02-13 1987-07-07 Tractech, Inc. Torque-proportioning differential with cylindrical spacer
CN110534564A (en) * 2019-08-30 2019-12-03 中国振华集团永光电子有限公司（国营第八七三厂） A kind of diode chip for backlight unit multiple-layer metallization layer and preparation method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677876A (en) * 1984-02-13 1987-07-07 Tractech, Inc. Torque-proportioning differential with cylindrical spacer
CN110534564A (en) * 2019-08-30 2019-12-03 中国振华集团永光电子有限公司（国营第八七三厂） A kind of diode chip for backlight unit multiple-layer metallization layer and preparation method thereof
CN110534564B (en) * 2019-08-30 2023-08-04 中国振华集团永光电子有限公司（国营第八七三厂） Manufacturing method of multi-layer metallization layer of diode chip

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee