GB1274269A - Method of producing clock pulses - Google Patents

Method of producing clock pulses

Info

Publication number
GB1274269A
GB1274269A GB4356369A GB4356369A GB1274269A GB 1274269 A GB1274269 A GB 1274269A GB 4356369 A GB4356369 A GB 4356369A GB 4356369 A GB4356369 A GB 4356369A GB 1274269 A GB1274269 A GB 1274269A
Authority
GB
United Kingdom
Prior art keywords
pulses
pulse train
pulse
gate
monostable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4356369A
Inventor
Heinz Tottewitz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zentronik VEB
Original Assignee
Zentronik VEB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zentronik VEB filed Critical Zentronik VEB
Priority to GB4356369A priority Critical patent/GB1274269A/en
Priority to NL6913574A priority patent/NL6913574A/xx
Priority to FR6934573A priority patent/FR2062072A5/fr
Priority to DE19702016275 priority patent/DE2016275A1/en
Publication of GB1274269A publication Critical patent/GB1274269A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1415—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol conversion to or from pulse frequency coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Abstract

1,274,269. Clock pulse generator. KOMBINAT ZENTRONIK VEB. 3 Sept., 1969, No. 43563/69. Heading G4C. Circuit arrangement producing clock pulses from a stored pulse train has a monostable multivibrator 1 receiving the pulse train, an OR gate containing inverters 2, 3, 4, coupled to the multivibrator, 1, a flip-flop 5 coupled to the OR gate and receiving the pulse train and two two-input AND gates 8, 9 respectively coupled to an output of the flip-flop and each receiving the input pulse train. Data serially stored on a magnetic media has data pulses interlaced with clock pulses so that a " 1 " is represented by two pulses and a " 0 " by one pulse. A train of pulses is fed to the monostable I which has a resetting time greater than the time between the two pulses of a " 1 " but less than the time between two clock pulses either side of a " 0 ". The monostable is set by a positive going pulse and reset by a negative going pulse so that a series of " 1 "s produces the shorter pulses of Fig. 2 and a series of " 0"s the longer pulses of Fig. 2. The output of the monostable and the pulse train are combined in an OR gate composed of inverters 2, 3, 4 and fed to a flip-flop 5. The two outputs of the flipflop are shown in the top two rows of Fig. 4 and these respectively enable AND gates 8, 9 which also receive the input pulse train so that AND gate 8 produces pulses indicating the data from the pulse train (Fig. 4, third row) and AND gate 9 produces clock pulses.
GB4356369A 1969-05-08 1969-09-03 Method of producing clock pulses Expired GB1274269A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB4356369A GB1274269A (en) 1969-05-08 1969-09-03 Method of producing clock pulses
NL6913574A NL6913574A (en) 1969-05-08 1969-09-05
FR6934573A FR2062072A5 (en) 1969-05-08 1969-10-09
DE19702016275 DE2016275A1 (en) 1969-05-08 1970-04-06 Patentwesen, Ost-Berlin WPI39703 Method for generating clock pulses

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DD13970369 1969-05-08
GB4356369A GB1274269A (en) 1969-05-08 1969-09-03 Method of producing clock pulses
NL6913574A NL6913574A (en) 1969-05-08 1969-09-05
FR6934573A FR2062072A5 (en) 1969-05-08 1969-10-09

Publications (1)

Publication Number Publication Date
GB1274269A true GB1274269A (en) 1972-05-17

Family

ID=27430190

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4356369A Expired GB1274269A (en) 1969-05-08 1969-09-03 Method of producing clock pulses

Country Status (4)

Country Link
DE (1) DE2016275A1 (en)
FR (1) FR2062072A5 (en)
GB (1) GB1274269A (en)
NL (1) NL6913574A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2324180A1 (en) * 1975-09-10 1977-04-08 Materiel Telephonique CLOCK SIGNAL AND AUXILIARY SIGNAL TRANSMISSION SYSTEM

Also Published As

Publication number Publication date
FR2062072A5 (en) 1971-06-25
NL6913574A (en) 1971-03-09
DE2016275A1 (en) 1970-11-19

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees