GB1273904A - Improvements in printed circuits - Google Patents

Improvements in printed circuits

Info

Publication number
GB1273904A
GB1273904A GB1780870A GB1780870A GB1273904A GB 1273904 A GB1273904 A GB 1273904A GB 1780870 A GB1780870 A GB 1780870A GB 1780870 A GB1780870 A GB 1780870A GB 1273904 A GB1273904 A GB 1273904A
Authority
GB
United Kingdom
Prior art keywords
panels
solder
april
boards
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1780870A
Inventor
John Bryan Walker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BTR Industries Ltd
Original Assignee
BTR Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BTR Industries Ltd filed Critical BTR Industries Ltd
Priority to GB1780870A priority Critical patent/GB1273904A/en
Publication of GB1273904A publication Critical patent/GB1273904A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

1,273,904. Printed circuits. BTR INDUSTRIES Ltd. 19 April, 1971 [14 April, 1970], No. 17808/70. Heading H1R. A printed circuit comprising two electrically insulating panels 1, having circuit patterns 2, and having a layer of solder or like fusible metal on their surfaces such that when the boards are laid together and heated the solder coating bonds the boards together where the circuit patterns meet. Metallized holes 3 provide for connections extending through the panels. A layer of electrically insulative flux 5 may fill the spaces between the panel surfaces and to prevent ingress of moisture "tinned" conductor strips 4 may be formed around the margins of each panel. The circuits which are copper may be arranged to mate over their whole area inbetween the panels which may be of glass fibre. Heating may be by induction or an oven and the solder may extend through the holes, Fig. 2 (not shown). More than two panels may be similarly bonded together.
GB1780870A 1970-04-14 1970-04-14 Improvements in printed circuits Expired GB1273904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1780870A GB1273904A (en) 1970-04-14 1970-04-14 Improvements in printed circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1780870A GB1273904A (en) 1970-04-14 1970-04-14 Improvements in printed circuits

Publications (1)

Publication Number Publication Date
GB1273904A true GB1273904A (en) 1972-05-10

Family

ID=10101596

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1780870A Expired GB1273904A (en) 1970-04-14 1970-04-14 Improvements in printed circuits

Country Status (1)

Country Link
GB (1) GB1273904A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028657A1 (en) * 1979-05-24 1981-05-20 Fujitsu Limited Hollow multilayer printed wiring board, and method of fabricating same
US4685210A (en) * 1985-03-13 1987-08-11 The Boeing Company Multi-layer circuit board bonding method utilizing noble metal coated surfaces
GB2212333A (en) * 1987-11-11 1989-07-19 Gen Electric Co Plc Method of fabricating multi-layer circuits
CN114101839A (en) * 2021-11-29 2022-03-01 苏州浪潮智能科技有限公司 Wave soldering furnace

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028657A1 (en) * 1979-05-24 1981-05-20 Fujitsu Limited Hollow multilayer printed wiring board, and method of fabricating same
EP0028657B1 (en) * 1979-05-24 1988-08-10 Fujitsu Limited Hollow multilayer printed wiring board, and method of fabricating same
US4685210A (en) * 1985-03-13 1987-08-11 The Boeing Company Multi-layer circuit board bonding method utilizing noble metal coated surfaces
GB2212333A (en) * 1987-11-11 1989-07-19 Gen Electric Co Plc Method of fabricating multi-layer circuits
CN114101839A (en) * 2021-11-29 2022-03-01 苏州浪潮智能科技有限公司 Wave soldering furnace

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Legal Events

Date Code Title Description
PS Patent sealed
PLE Entries relating assignments, transmissions, licences in the register of patents
PCNP Patent ceased through non-payment of renewal fee