GB1263094A - Improvements in or relating to digital-to-analogue converters - Google Patents
Improvements in or relating to digital-to-analogue convertersInfo
- Publication number
- GB1263094A GB1263094A GB29384/69A GB2938469A GB1263094A GB 1263094 A GB1263094 A GB 1263094A GB 29384/69 A GB29384/69 A GB 29384/69A GB 2938469 A GB2938469 A GB 2938469A GB 1263094 A GB1263094 A GB 1263094A
- Authority
- GB
- United Kingdom
- Prior art keywords
- digital
- flop
- flip
- shift register
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1,263,094. Digital/analogue converter. ROSEMOUNT ENG. CO. Ltd. 9 June, 1970 [10 June, 1969], No. 29384/69. Heading G4H. In a digital/analogue converter in which a digital input signal is converted using shift register 10 (Fig. 1) to a pulse train, the pulse train being sampled, the results of the samples are averaged to give an analogue output signal of amplitude proportional to the digital input. In the embodiment of Fig. 1 which utilizes a shift register as in Specification 1,227,829 the shifting of a binary coded signal in shift register 10 and the enabling of AND gate 15 by a JK flip-flop 16 are controlled such that on output lead 21 each bit of the signal appears a number of times corresponding to its significance to control a switch 26 which when operated connects a resistor 27 and capacitor 28 to a reference voltage source 26. The D.C. output across capacitor 28 then has an average value proportional to the input. In the embodiment of Fig. 2 the gate is replaced by a JK flip-flop (30, not shown). In a further modification the flip-flop (30) is replaced by a D flip-flop (40, Fig. 3, not shown).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB29384/69A GB1263094A (en) | 1969-06-10 | 1969-06-10 | Improvements in or relating to digital-to-analogue converters |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB29384/69A GB1263094A (en) | 1969-06-10 | 1969-06-10 | Improvements in or relating to digital-to-analogue converters |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1263094A true GB1263094A (en) | 1972-02-09 |
Family
ID=10290712
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB29384/69A Expired GB1263094A (en) | 1969-06-10 | 1969-06-10 | Improvements in or relating to digital-to-analogue converters |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1263094A (en) |
-
1969
- 1969-06-10 GB GB29384/69A patent/GB1263094A/en not_active Expired
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