GB1248904A - Improvements in or relating to digital instruments - Google Patents

Abstract

1,248,904. Digital display arrangements. SMITHS INDUSTRIES Ltd. 16 Oct., 1968 [16 Oct., 1967], No. 47085/67. Heading G4H. The output of a measuring device is applied to a number of digital display devices 30-32, having an astable oscillator within unit 10 arranged to switch the display devices on and off at such a rate as to be undiscernable to the eye and means are provided for varying the mark/space ratio of the oscillator to vary the brightness of the display. The anodes of the display devices are connected to the 200v. supply through resistors 34 and via diodes 35 to the multivibrator. When the multivibrator is in one state it acts as a short circuit across the display devices to extinguish them. The mark/space ratio is variable by an adjustable potentiometer 37. The cathodes of the displace devices are connected to a speed measuring circuit for a road vehicle. In one form a generator driven from the output shaft of the gear-box generates a frequency signal which is squared to produce pulses at a frequency indicating the speed. A sampling gate opened for a set period passes the pulses to a three decade binary counter providing signals for the display device. In another form hold circuits are interposed between the counter and the display to hold the signals during the sampling period. In a modification of this form the sampling gate is omitted, the sampling period being established by resetting the counters at the start and, at the end of the period enabling the hold circuits to store the value counted. In a variant of this form the timing circuit may be triggered by a gate detecting a zero condition in the counter, which counts continuously, the gate enabling the hold circuits after the elapsed sampling period. An independent timing circuit resets the hold circuits to zero if the interval between two successive enabling pulses exceeds a set value. In another form the frequency signal is converted to an amplitude signal and compared with a step signal to obtain a timed pulse. This is used to close a gate which, since the beginning of the cycle, has been passing clock pulses to the counter.