GB1242974A - Shift register comparator having failsafe qualities - Google Patents

Abstract

1,242,974. Comparators. WESTINGHOUSE ELECTRIC CO. 10 Nov., 1969 [3 Dec., 1968], No. 64841/69. Heading G4M. [Also in Division H3] Serial pulse trains A, B in which words are encoded using a "comma-free" code with a predetermined minimum frequency of alternation between 0 and 1 bits are shifted into respective registers 12, 14 and corresponding pairs of bits are compared in stages 22a-22f, each of which comprises an upper and lower transmission path 26a, 25a for the output of an A.C. generator 16, each path including a pair of series-connected power switched A.C. amplifiers such as 27a, 28a controlled by the outputs of the associated register stages FF such that the upper or the lower path in each stage is only completed if the associated pair of bits correspond. The amplifiers 27a &e. Fig. 3 have an A.C. input to a base drive circuit 50, e.g. a transformer which performs a D.C. blocking function, has a fail-safe characteristic and is arranged to overcome the forward conduction threshold of transistor 44 only when the A.C. input level is not below the normal output level of generator 16. The output of the amplifier is taken from an attenuator 52, e.g. a transformer, which reduces the gain to unity so that the same threshold level is applied in each amplifier. Power switching of the amplifier is performed by circuit 36a. A positive 1 bit on input 59 e.g. from the Q output of FF1<SP>1</SP> turns on transistor 54 so that point 58 becomes positive and capacitor 60 is charged via diode 64 which clamps power output P to earth so that transistor 44 does not conduct. An earth level O bit on input 59 turns on transistor 56 so that point 58 is earthed and the output P goes negative to allow conduction of transistor 44. Capacitor 60 is chosen so that if a 0-1 transition does not occur within the maximum allowable interval, e.g. 5 bits, the charge on it falls to a level below which transistor 44 does not conduct. Fail-safe operation is ensured if generator 16 fails or if one of the register stages freezes in either state or if the minimum allowable 0-1 transition frequency is not maintained.