GB1215975A - Bistable trigger circuit - Google Patents

Bistable trigger circuit

Info

Publication number
GB1215975A
GB1215975A GB1671768A GB1671768A GB1215975A GB 1215975 A GB1215975 A GB 1215975A GB 1671768 A GB1671768 A GB 1671768A GB 1671768 A GB1671768 A GB 1671768A GB 1215975 A GB1215975 A GB 1215975A
Authority
GB
United Kingdom
Prior art keywords
gates
inputs
april
resistor
pulse generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1671768A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Precisa AG Rechenmaschinenfabrik
Original Assignee
Precisa AG Rechenmaschinenfabrik
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Precisa AG Rechenmaschinenfabrik filed Critical Precisa AG Rechenmaschinenfabrik
Publication of GB1215975A publication Critical patent/GB1215975A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Landscapes

  • Manipulation Of Pulses (AREA)
  • Treatment Of Fiber Materials (AREA)
  • Logic Circuits (AREA)

Abstract

1,215,975. Bi-stable circuits. PRECISA A.G. RECHENMASCHINENFABRIK. 8 April, 1968 [7 April, 1967], No. 16717/68. Heading H3T. A bi-stable circuit comprises two integrated inverting logic gates 11, 11<SP>1</SP> each having its respective first input ez, ez<SP>1</SP>, and the output of the other gate cross-connected and having a second input e1, e1<SP>1</SP> connected to a first resistor 14, a control voltage V1 via a second resistor 12 only and a pulse generator 17 via a capacitor 13 only. Switches 16, 16<SP>1</SP> enable alternate control voltages to be selected for the respective gates. Fig. la (not shown) indicates the behaviour of the gates for different combinations of switch positions. Alternative biasing inputs may be obtained by feedback from the output of the same NAND gate on both sides (Fig. 3, not shown) or on one side only (Fig. 4; not shown), with a common pulse generator for both sides. This arrangement acts as a frequency divider. Fig. 5 (not shown) uses NAND gates with three inputs so that there are two inputs available for switching and biasing purposes. NOR gates may be used instead of the NAND gates described.
GB1671768A 1967-04-07 1968-04-08 Bistable trigger circuit Expired GB1215975A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH495567A CH460861A (en) 1967-04-07 1967-04-07 Flip-flop circuit with solid state gates

Publications (1)

Publication Number Publication Date
GB1215975A true GB1215975A (en) 1970-12-16

Family

ID=4285421

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1671768A Expired GB1215975A (en) 1967-04-07 1968-04-08 Bistable trigger circuit

Country Status (4)

Country Link
CH (1) CH460861A (en)
DE (1) DE1562344A1 (en)
GB (1) GB1215975A (en)
SE (1) SE334177B (en)

Also Published As

Publication number Publication date
SE334177B (en) 1971-04-19
CH460861A (en) 1968-08-15
DE1562344A1 (en) 1970-03-05

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