GB1187550A - Analog-to-Digital Converter - Google Patents
Analog-to-Digital ConverterInfo
- Publication number
- GB1187550A GB1187550A GB5100468A GB5100468A GB1187550A GB 1187550 A GB1187550 A GB 1187550A GB 5100468 A GB5100468 A GB 5100468A GB 5100468 A GB5100468 A GB 5100468A GB 1187550 A GB1187550 A GB 1187550A
- Authority
- GB
- United Kingdom
- Prior art keywords
- stage
- delivering
- operational amplifier
- receiving
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal
- H03M1/445—Sequential comparisons in series-connected stages with change in value of analogue signal the stages being of the folding type
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1,187,550. A/D converters. INTERNATIONAL BUSINESS MACHINES CORP. 28 Oct., 1968 [6 Nov., 1967], No. 51004/68. Heading G4H. Apparatus for converting an analogue input voltage into Gray binary code includes a plurality of series connected stages one of which is shown in Fig. 5, each stage including a first operational amplifier OAl, receiving the input V n to the stage and a fixed reference signal E/2 and delivering an output signal V n+1 = 2 |V n | - E to the next stage and a second operational amplifier OA2 receiving the input voltage V n and delivering a digital output bit D n in accordance with the polarity of V n . The first stage does not receive the reference signal E/2 and determines the polarity bit D1. The Gray coded outputs D1-D5 may be converted to natural binary using exclusive OR gates.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR6008812 | 1967-11-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1187550A true GB1187550A (en) | 1970-04-08 |
Family
ID=8970634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB5100468A Expired GB1187550A (en) | 1967-11-06 | 1968-10-28 | Analog-to-Digital Converter |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE1805155A1 (en) |
FR (1) | FR1550362A (en) |
GB (1) | GB1187550A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0492267B1 (en) * | 1990-12-10 | 1996-07-10 | Andrej Zatler | Electronic analog-to-digital converter |
FR3031845B1 (en) | 2015-01-16 | 2017-01-20 | Inst Polytechnique Grenoble | SYSTEM FOR CONNECTING A DECENTRALIZED MONOPHASE GENERATOR TO A THREE-PHASE NETWORK |
-
1967
- 1967-11-06 FR FR1550362D patent/FR1550362A/fr not_active Expired
-
1968
- 1968-10-25 DE DE19681805155 patent/DE1805155A1/en active Pending
- 1968-10-28 GB GB5100468A patent/GB1187550A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR1550362A (en) | 1968-12-20 |
DE1805155A1 (en) | 1969-06-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |