GB1014391A - Improvements in arithmetic units for digital calculators and the like - Google Patents

Abstract

1,014,391. Electronic calculating apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Sept. 19, 1962 [Sept. 20, 1961], No. 33721/61. Heading G4A. The Specification describes operations called pseudo - multiplication and pseudo - division. These are similar to division by repeated subtraction and multiplication by repeated addition save that the subtrahend or addend are modified as the computation proceeds. Among other examples the Specification describes the computation of log (1 + y/x). Digits q; are found by pseudo-division such that y + x x = x# (1 + 10<SP>-j</SP>)qj . . . . . (1) j = o Then log(1 + y/x) = # j qj log(1 + 10<SP>-j</SP>) . . . (2) The process by which the RH side of (2) is evaluated is termed pseudo-multiplication. Ordinary division is defined by the equations, referring to the computation of the jth order of the quotient, qj, y n +1 = yn - 10<SP>j</SP>x n . . . . . . (3) x n + 1 = x n . . . . . . . . . . . (4) For accuracy it is usual for the dividend register to be shifted rather than the divisor registe and so, putting 10<SP>-j</SP>yn = Z n , (3) becomes Zn + 1 = z n - x n . . . . . (5) Then, qj is defined by Zq j # o > Zqj + 1 Pseudo division differs from this only in the equation (4). It is shown in the Specification that the computation of the qj of (1) is defined by equations (5), (6) and X n + 1 = X n + 10<SP>-j</SP>x n The apparatus used is shown in Fig. 1. There are three operand registers, A and M of one full word length, and B of one word length plus two digits. An adder 3 has as inputs A or B in true form and B or M in true or complement form. The output is connected to all three registers and an indication of carry or borrow from the highest order is given. There is an operations counter 7 and a control unit 1 of the microprogram type, which stores control words of which the individual bits each control a specific gate. The control unit also generates the address in the unit of the next control word, which address may be modified by the signal on line 8. The Specification states that the adder 3 may be in the form of a stored table. A flow sheet for the operation of the apparatus in performing ordinary division (y/x) and pseudo-division in evaluating log (1 + y/x), tan<SP>-1</SP>(y/x) and (y/x)¢ is shown in Figure 2a. The Specification describes how the inverse functions (squares, exponentials, trigonometric functions) can be calculated using a similar process and states that a combined register for operand and result data may be provided.