GB0602139D0 - Printed wires arrangment for in-line memory (IMM) module - Google Patents

Printed wires arrangment for in-line memory (IMM) module

Info

Publication number
GB0602139D0
GB0602139D0 GBGB0602139.8A GB0602139A GB0602139D0 GB 0602139 D0 GB0602139 D0 GB 0602139D0 GB 0602139 A GB0602139 A GB 0602139A GB 0602139 D0 GB0602139 D0 GB 0602139D0
Authority
GB
United Kingdom
Prior art keywords
arrangment
imm
module
line memory
printed wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB0602139.8A
Other versions
GB2422963B (en
GB2422963A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020050009709A external-priority patent/KR100702016B1/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB0602139D0 publication Critical patent/GB0602139D0/en
Publication of GB2422963A publication Critical patent/GB2422963A/en
Application granted granted Critical
Publication of GB2422963B publication Critical patent/GB2422963B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/10545Related components mounted on both sides of the PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
GB0602139A 2005-02-02 2006-02-02 Printed wires arrangment for in-line memory (IMM) module Active GB2422963B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050009709A KR100702016B1 (en) 2005-02-02 2005-02-02 Printed Circuit Board of Dual In-line Memory Module and Dual In-line Memory Module using the same
US11/227,161 US7394160B2 (en) 2005-02-02 2005-09-16 Printed wires arrangement for in-line memory (IMM) module

Publications (3)

Publication Number Publication Date
GB0602139D0 true GB0602139D0 (en) 2006-03-15
GB2422963A GB2422963A (en) 2006-08-09
GB2422963B GB2422963B (en) 2008-01-30

Family

ID=36100944

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0602139A Active GB2422963B (en) 2005-02-02 2006-02-02 Printed wires arrangment for in-line memory (IMM) module

Country Status (3)

Country Link
JP (1) JP2006216956A (en)
DE (1) DE102006005955B4 (en)
GB (1) GB2422963B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008097997A1 (en) 2007-02-06 2008-08-14 Rambus Inc. Semiconductor module with micro-buffers
WO2008121376A2 (en) * 2007-03-30 2008-10-09 Rambus, Inc. Adjustable width strobe interface
US20140264904A1 (en) * 2013-03-13 2014-09-18 Apple Inc. Unified pcb design for ssd applications, various density configurations, and direct nand access
US9087846B2 (en) 2013-03-13 2015-07-21 Apple Inc. Systems and methods for high-speed, low-profile memory packages and pinout designs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232389A (en) * 1987-03-20 1988-09-28 株式会社日立製作所 Wiring system of surface mount package
US5130894A (en) * 1990-11-26 1992-07-14 At&T Bell Laboratories Three-dimensional circuit modules
JPH04329692A (en) * 1991-04-30 1992-11-18 Koufu Nippon Denki Kk Both side mounting type memory package
JPH06310827A (en) * 1993-04-26 1994-11-04 Nec Corp Surface mounting component arrangement structure
JP3109479B2 (en) * 1998-06-12 2000-11-13 日本電気株式会社 Heat radiator and memory module equipped with heat radiator
US6721195B2 (en) * 2001-07-12 2004-04-13 Micron Technology, Inc. Reversed memory module socket and motherboard incorporating same
US20050195629A1 (en) * 2004-03-02 2005-09-08 Leddige Michael W. Interchangeable connection arrays for double-sided memory module placement
US20060044083A1 (en) * 2004-08-27 2006-03-02 Maksim Kuzmenka Circuit board and method for producing a circuit board

Also Published As

Publication number Publication date
JP2006216956A (en) 2006-08-17
GB2422963B (en) 2008-01-30
GB2422963A (en) 2006-08-09
DE102006005955A1 (en) 2006-08-10
DE102006005955B4 (en) 2007-01-25

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