GB0019968D0 - Reduced capacitance dielectric structure for integrated circuits - Google Patents

Reduced capacitance dielectric structure for integrated circuits

Info

Publication number
GB0019968D0
GB0019968D0 GBGB0019968.7A GB0019968A GB0019968D0 GB 0019968 D0 GB0019968 D0 GB 0019968D0 GB 0019968 A GB0019968 A GB 0019968A GB 0019968 D0 GB0019968 D0 GB 0019968D0
Authority
GB
United Kingdom
Prior art keywords
integrated circuits
dielectric structure
capacitance dielectric
reduced capacitance
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB0019968.7A
Other versions
GB2358733A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of GB0019968D0 publication Critical patent/GB0019968D0/en
Publication of GB2358733A publication Critical patent/GB2358733A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
GB0019968A 1999-08-30 2000-08-14 Integrated circuit with multi-layer dielectric having reduced capacitance Withdrawn GB2358733A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US38571399A 1999-08-30 1999-08-30

Publications (2)

Publication Number Publication Date
GB0019968D0 true GB0019968D0 (en) 2000-10-04
GB2358733A GB2358733A (en) 2001-08-01

Family

ID=23522554

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0019968A Withdrawn GB2358733A (en) 1999-08-30 2000-08-14 Integrated circuit with multi-layer dielectric having reduced capacitance

Country Status (3)

Country Link
JP (1) JP2001102377A (en)
KR (1) KR20010030169A (en)
GB (1) GB2358733A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107966481B (en) * 2017-11-20 2019-10-11 西安交通大学 A kind of Material Identification sensor and preparation method thereof based on composite capacitive structure

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7307343B2 (en) 2002-05-30 2007-12-11 Air Products And Chemicals, Inc. Low dielectric materials and methods for making same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5548159A (en) * 1994-05-27 1996-08-20 Texas Instruments Incorporated Porous insulator for line-to-line capacitance reduction
US5534731A (en) * 1994-10-28 1996-07-09 Advanced Micro Devices, Incorporated Layered low dielectric constant technology
JPH09129727A (en) * 1995-10-30 1997-05-16 Nec Corp Semiconductor device and manufacturing method thereof
US5886410A (en) * 1996-06-26 1999-03-23 Intel Corporation Interconnect structure with hard mask and low dielectric constant materials
KR19980055721A (en) * 1996-12-28 1998-09-25 김영환 Method of forming protective film of semiconductor device
US6300672B1 (en) * 1998-07-22 2001-10-09 Siemens Aktiengesellschaft Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication
US20020001876A1 (en) * 1999-01-26 2002-01-03 Mahjoub Ali Abdelgadir Method of making an integrated circuit device having a planar interlevel dielectric layer
US6274933B1 (en) * 1999-01-26 2001-08-14 Agere Systems Guardian Corp. Integrated circuit device having a planar interlevel dielectric layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107966481B (en) * 2017-11-20 2019-10-11 西安交通大学 A kind of Material Identification sensor and preparation method thereof based on composite capacitive structure

Also Published As

Publication number Publication date
KR20010030169A (en) 2001-04-16
JP2001102377A (en) 2001-04-13
GB2358733A (en) 2001-08-01

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)