FR3121559B1 - Convertisseur analogique-numérique par approximations successives multicanaux - Google Patents
Convertisseur analogique-numérique par approximations successives multicanaux Download PDFInfo
- Publication number
- FR3121559B1 FR3121559B1 FR2103305A FR2103305A FR3121559B1 FR 3121559 B1 FR3121559 B1 FR 3121559B1 FR 2103305 A FR2103305 A FR 2103305A FR 2103305 A FR2103305 A FR 2103305A FR 3121559 B1 FR3121559 B1 FR 3121559B1
- Authority
- FR
- France
- Prior art keywords
- analog
- vin
- successive
- switch
- digital converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000006243 chemical reaction Methods 0.000 abstract 4
- 239000003990 capacitor Substances 0.000 abstract 2
- 101100112673 Rattus norvegicus Ccnd2 gene Proteins 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/462—Details of the control circuitry, e.g. of the successive approximation register
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
- H03M1/1225—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages using time-division multiplexing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
- H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Convertisseur analogique-numérique par approximations successives multicanaux La présente description concerne un convertisseur analogique-numérique par approximations successives (20) comprenant : - un convertisseur numérique-analogique (22) configuré pour recevoir un signal numérique (Dout), comprenant des premières unités de conversion (A1, A2, A3, A4, A5), chacune étant configurée pour échantillonner un signal analogique (VIN_1, VIN_2, VIN_3, VIN_4, VIN_5) par l'intermédiaire d'un premier commutateur et pour fournir un premier niveau de tension (Vn1) par l'intermédiaire d'un deuxième commutateur (SWAO1, SWAO2, SWAO3, SWAO4, SWAO5), ledit convertisseur comprenant en outre une seule deuxième unité de conversion (B) configurée pour fournir un deuxième niveau de tension (Vn2), chaque première unité de conversion comprenant un premier réseau de condensateurs (18A) et un premier réseau de commutateurs (19A) commandés par le signal numérique, la deuxième unité de conversion comprenant un deuxième réseau de condensateurs (18B) et un deuxième réseau de commutateurs (19B) ; et - un circuit de commande (13) configuré pour fermer simultanément les premiers commutateurs et pour fermer successivement les deuxièmes commutateurs pour convertir chaque signal analogique échantillonné. Figure pour l'abrégé : Fig. 3
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2103305A FR3121559B1 (fr) | 2021-03-31 | 2021-03-31 | Convertisseur analogique-numérique par approximations successives multicanaux |
US17/707,113 US11855654B2 (en) | 2021-03-31 | 2022-03-29 | Multichannel successive approximation analog-to-digital converter |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2103305 | 2021-03-31 | ||
FR2103305A FR3121559B1 (fr) | 2021-03-31 | 2021-03-31 | Convertisseur analogique-numérique par approximations successives multicanaux |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3121559A1 FR3121559A1 (fr) | 2022-10-07 |
FR3121559B1 true FR3121559B1 (fr) | 2024-05-24 |
Family
ID=77710789
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR2103305A Active FR3121559B1 (fr) | 2021-03-31 | 2021-03-31 | Convertisseur analogique-numérique par approximations successives multicanaux |
Country Status (2)
Country | Link |
---|---|
US (1) | US11855654B2 (fr) |
FR (1) | FR3121559B1 (fr) |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5691722A (en) * | 1996-05-21 | 1997-11-25 | Wang; Wenwei | Direct-digitizing, self stabilizing analog to digital converter |
US7456768B2 (en) * | 2006-04-07 | 2008-11-25 | Washington State University | Analog-to-digital converters based on an interleaving architecture and associated methods |
WO2008142486A1 (fr) * | 2007-05-18 | 2008-11-27 | Nokia Corporation | Convertisseur analogique/numérique |
IT1395248B1 (it) * | 2009-03-18 | 2012-09-05 | St Microelectronics Rousset | Comparatore con compensazione di offset, in particolare per convertitori analogico-digitali |
US8159382B2 (en) * | 2009-11-27 | 2012-04-17 | Texas Instruments Incorporated | Low power converter and shutdown SAR ADC architecture |
US8350738B2 (en) * | 2011-01-20 | 2013-01-08 | International Business Machines Corporation | Track and hold amplifiers and digital calibration for analog-to-digital converters |
US8981985B2 (en) * | 2011-09-06 | 2015-03-17 | National University Of Singapore | Analog-to-digital converter for a multi-channel signal acquisition system |
US8736480B1 (en) * | 2013-01-11 | 2014-05-27 | Intel Corporation | Successive approximation analog-to-digital conversion architectural arrangement for receivers |
US8947283B2 (en) * | 2013-06-12 | 2015-02-03 | University Of Macau | Sampling front-end for analog to digital converter |
US8884801B1 (en) * | 2013-11-21 | 2014-11-11 | Inphi Corporation | High-speed analog-to-digital conversion system with flash assisted parallel SAR architecture |
JP2017192099A (ja) * | 2016-04-15 | 2017-10-19 | ローム株式会社 | 逐次比較型a/dコンバータ |
US10454488B1 (en) * | 2018-05-31 | 2019-10-22 | Analog Devices Global Unlimited Company | Variable speed comparator |
US11570392B2 (en) * | 2019-07-30 | 2023-01-31 | Senseics Corporation | Scalable readout integrated circuit architecture with per-pixel automatic programmable gain for high dynamic range imaging |
US11018684B1 (en) * | 2020-08-27 | 2021-05-25 | Nxp B.V. | Hybrid pipeline analog-to-digital converter |
KR20220032682A (ko) * | 2020-09-08 | 2022-03-15 | 삼성전자주식회사 | 아날로그 디지털 변환기 및 아날로그 디지털 변환기의 아날로그 디지털 변환 방법 |
-
2021
- 2021-03-31 FR FR2103305A patent/FR3121559B1/fr active Active
-
2022
- 2022-03-29 US US17/707,113 patent/US11855654B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11855654B2 (en) | 2023-12-26 |
FR3121559A1 (fr) | 2022-10-07 |
US20220321140A1 (en) | 2022-10-06 |
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PLFP | Fee payment |
Year of fee payment: 2 |
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PLSC | Publication of the preliminary search report |
Effective date: 20221007 |
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PLFP | Fee payment |
Year of fee payment: 3 |
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PLFP | Fee payment |
Year of fee payment: 4 |