FR3102884B1 - Dispositif memoire non volatile selecteur et procede de lecture associe - Google Patents
Dispositif memoire non volatile selecteur et procede de lecture associe Download PDFInfo
- Publication number
- FR3102884B1 FR3102884B1 FR1912328A FR1912328A FR3102884B1 FR 3102884 B1 FR3102884 B1 FR 3102884B1 FR 1912328 A FR1912328 A FR 1912328A FR 1912328 A FR1912328 A FR 1912328A FR 3102884 B1 FR3102884 B1 FR 3102884B1
- Authority
- FR
- France
- Prior art keywords
- memory device
- reading process
- associated reading
- selector memory
- volatile selector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0038—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0092—Write characterized by the shape, e.g. form, length, amplitude of the write pulse
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Memories (AREA)
Abstract
DISPOSITIF MEMOIRE NON VOLATILE SELECTEUR ET PROCEDE DE LECTURE ASSOCIE L’invention concerne un dispositif (1) mémoire non volatile et sélecteur comportant une première électrode (3), une seconde électrode (4) et au moins une couche (2) réalisée dans un matériau actif. Le dispositif (1) présente au moins deux états mémoire programmables associés à deux tensions de seuil et assure également un rôle de sélecteur quand il est dans un état fortement résistif. Figure à publier avec l’abrégé : Figure 4
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1912328A FR3102884B1 (fr) | 2019-11-04 | 2019-11-04 | Dispositif memoire non volatile selecteur et procede de lecture associe |
PCT/EP2020/080673 WO2021089478A1 (fr) | 2019-11-04 | 2020-11-02 | Dispositif memoire non volatile selecteur et procede de lecture associe |
US17/774,017 US11923006B2 (en) | 2019-11-04 | 2020-11-02 | Selective non-volatile memory device and associated reading method |
EP20797149.0A EP4055605A1 (fr) | 2019-11-04 | 2020-11-02 | Dispositif memoire non volatile selecteur et procede de lecture associe |
CN202080086299.0A CN114830238A (zh) | 2019-11-04 | 2020-11-02 | 选择性非易失性存储器器件及相关联的读取方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1912328A FR3102884B1 (fr) | 2019-11-04 | 2019-11-04 | Dispositif memoire non volatile selecteur et procede de lecture associe |
FR1912328 | 2019-11-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3102884A1 FR3102884A1 (fr) | 2021-05-07 |
FR3102884B1 true FR3102884B1 (fr) | 2021-11-12 |
Family
ID=70008615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1912328A Active FR3102884B1 (fr) | 2019-11-04 | 2019-11-04 | Dispositif memoire non volatile selecteur et procede de lecture associe |
Country Status (5)
Country | Link |
---|---|
US (1) | US11923006B2 (fr) |
EP (1) | EP4055605A1 (fr) |
CN (1) | CN114830238A (fr) |
FR (1) | FR3102884B1 (fr) |
WO (1) | WO2021089478A1 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100514695C (zh) * | 2002-03-15 | 2009-07-15 | 阿克松技术公司 | 微电子可编程构件 |
US20040257848A1 (en) | 2003-06-18 | 2004-12-23 | Macronix International Co., Ltd. | Method for adjusting the threshold voltage of a memory cell |
KR102532201B1 (ko) * | 2016-07-22 | 2023-05-12 | 삼성전자 주식회사 | 메모리 소자 |
WO2018066320A1 (fr) * | 2016-10-04 | 2018-04-12 | ソニーセミコンダクタソリューションズ株式会社 | Elément de commutation, dispositif de stockage et système de mémoire |
-
2019
- 2019-11-04 FR FR1912328A patent/FR3102884B1/fr active Active
-
2020
- 2020-11-02 WO PCT/EP2020/080673 patent/WO2021089478A1/fr unknown
- 2020-11-02 US US17/774,017 patent/US11923006B2/en active Active
- 2020-11-02 CN CN202080086299.0A patent/CN114830238A/zh active Pending
- 2020-11-02 EP EP20797149.0A patent/EP4055605A1/fr active Pending
Also Published As
Publication number | Publication date |
---|---|
US11923006B2 (en) | 2024-03-05 |
WO2021089478A1 (fr) | 2021-05-14 |
US20220366981A1 (en) | 2022-11-17 |
EP4055605A1 (fr) | 2022-09-14 |
CN114830238A (zh) | 2022-07-29 |
FR3102884A1 (fr) | 2021-05-07 |
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Legal Events
Date | Code | Title | Description |
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PLFP | Fee payment |
Year of fee payment: 2 |
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PLSC | Publication of the preliminary search report |
Effective date: 20210507 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
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PLFP | Fee payment |
Year of fee payment: 4 |
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PLFP | Fee payment |
Year of fee payment: 5 |