FR3078441B1 - Dispositif quantique comprenant des transistors fet et des qubits co-integres sur un meme substrat - Google Patents

Dispositif quantique comprenant des transistors fet et des qubits co-integres sur un meme substrat Download PDF

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FR3078441B1
FR3078441B1 FR1851743A FR1851743A FR3078441B1 FR 3078441 B1 FR3078441 B1 FR 3078441B1 FR 1851743 A FR1851743 A FR 1851743A FR 1851743 A FR1851743 A FR 1851743A FR 3078441 B1 FR3078441 B1 FR 3078441B1
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covering
qubits
integrated
quantum device
active layer
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FR3078441A1 (fr
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Louis HUTIN
Xavier JEHL
Maud Vinet
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Priority to US16/284,103 priority patent/US10679139B2/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
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    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
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    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/7613—Single electron transistors; Coulomb blockade devices
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
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    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66977—Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
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  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Thin Film Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

Dispositif quantique (100) comprenant : - un composant quantique (112, 124) formant un qubit, formée dans une couche active d'un substrat et comprenant : - une région de confinement (114) ; - des réservoirs de porteurs de charges ; - une première grille avant (116) recouvrant la région de confinement ; - des premiers espaceurs latéraux (120) disposés autour de la première grille avant et recouvrant des régions d'accès (122) ; - un transistor FET (130) formé dans la couche active, comprenant des régions de canal (132), de source et de drain (138) formées dans la couche active, une deuxième grille avant (134) recouvrant la région de canal, et des deuxièmes espaceurs latéraux (136) disposés autour de la deuxième grille avant et recouvrant des régions d'extension de source et de drain (137) ; et dans lequel une largeur des premiers espaceurs latéraux est supérieure à celle des deuxièmes espaceurs latéraux.
FR1851743A 2018-02-27 2018-02-27 Dispositif quantique comprenant des transistors fet et des qubits co-integres sur un meme substrat Active FR3078441B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1851743A FR3078441B1 (fr) 2018-02-27 2018-02-27 Dispositif quantique comprenant des transistors fet et des qubits co-integres sur un meme substrat
US16/284,103 US10679139B2 (en) 2018-02-27 2019-02-25 Quantum device comprising FET transistors and qubits co-integrated on the same substrate

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Application Number Priority Date Filing Date Title
FR1851743A FR3078441B1 (fr) 2018-02-27 2018-02-27 Dispositif quantique comprenant des transistors fet et des qubits co-integres sur un meme substrat
FR1851743 2018-02-27

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FR3078441A1 FR3078441A1 (fr) 2019-08-30
FR3078441B1 true FR3078441B1 (fr) 2020-03-20

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10903413B2 (en) 2018-06-20 2021-01-26 Equal!.Labs Inc. Semiconductor process optimized for quantum structures
US10934163B2 (en) 2018-06-20 2021-03-02 equal1.labs Inc. Classic-quantum injection interface device
US20230177376A1 (en) * 2020-03-16 2023-06-08 Diraq Pty Ltd A quantum processing element and system
FR3116946B1 (fr) 2020-11-27 2022-11-11 Commissariat Energie Atomique Procédé de réalisation d’un dispositif quantique
FR3131086A1 (fr) * 2021-12-16 2023-06-23 Commissariat A L'energie Atomique Et Aux Energies Alternatives Grille arriere pour dispositif quantique

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3033665B1 (fr) * 2015-03-11 2018-10-12 Commissariat A L'energie Atomique Et Aux Energies Alternatives Transistor a electron unique et son procede de realisation
EP3225587B1 (fr) * 2016-03-31 2021-07-28 Hitachi, Ltd. Dispositif à points quantiques à base de silicium
FR3072375B1 (fr) * 2017-10-18 2021-04-16 Commissariat Energie Atomique Dispositif quantique a qubits de spin couples de maniere modulable

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US10679139B2 (en) 2020-06-09
US20190266509A1 (en) 2019-08-29
FR3078441A1 (fr) 2019-08-30

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