FR3070081B1 - Procede d'ecriture d'un programme dans une memoire non-volatile tenant compte de l'usure de ladite memoire - Google Patents
Procede d'ecriture d'un programme dans une memoire non-volatile tenant compte de l'usure de ladite memoire Download PDFInfo
- Publication number
- FR3070081B1 FR3070081B1 FR1757638A FR1757638A FR3070081B1 FR 3070081 B1 FR3070081 B1 FR 3070081B1 FR 1757638 A FR1757638 A FR 1757638A FR 1757638 A FR1757638 A FR 1757638A FR 3070081 B1 FR3070081 B1 FR 3070081B1
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- FR
- France
- Prior art keywords
- program
- volatile memory
- writing
- wear
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
- G06F2212/1036—Life time enhancement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7211—Wear leveling
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
La présente invention concerne un procédé embarqué sur dispositif discret ou intégré d'écriture d'un programme incluant code et données dans une mémoire non-volatile, le procédé comprenant des étapes de : • pour une pluralité de zones de la mémoire non-volatile, détermination (102) sans données préalables d'un état d'usure de la zone avant écriture du nouveau programme, • réception et utilisation (106) de données de condition d'accès à une portion du programme depuis la mémoire volatile, la détermination desdites données étant mise en œuvre avant que la portion du programme ne soit écrite dans la mémoire non-volatile , • sélection (110, 116) d'au moins une des zones de la mémoire non-volatile où écrire la portion du programme, en fonction des données et des états d'usure déterminés.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1757638A FR3070081B1 (fr) | 2017-08-10 | 2017-08-10 | Procede d'ecriture d'un programme dans une memoire non-volatile tenant compte de l'usure de ladite memoire |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1757638 | 2017-08-10 | ||
FR1757638A FR3070081B1 (fr) | 2017-08-10 | 2017-08-10 | Procede d'ecriture d'un programme dans une memoire non-volatile tenant compte de l'usure de ladite memoire |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3070081A1 FR3070081A1 (fr) | 2019-02-15 |
FR3070081B1 true FR3070081B1 (fr) | 2021-04-09 |
Family
ID=60765754
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1757638A Active FR3070081B1 (fr) | 2017-08-10 | 2017-08-10 | Procede d'ecriture d'un programme dans une memoire non-volatile tenant compte de l'usure de ladite memoire |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR3070081B1 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9153337B2 (en) * | 2006-12-11 | 2015-10-06 | Marvell World Trade Ltd. | Fatigue management system and method for hybrid nonvolatile solid state memory system |
US20120317337A1 (en) * | 2011-06-09 | 2012-12-13 | Microsoft Corporation | Managing data placement on flash-based storage by use |
US9395924B2 (en) * | 2013-01-22 | 2016-07-19 | Seagate Technology Llc | Management of and region selection for writes to non-volatile memory |
US9524158B2 (en) * | 2015-02-23 | 2016-12-20 | Apple Inc. | Managing firmware updates for integrated components within mobile devices |
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2017
- 2017-08-10 FR FR1757638A patent/FR3070081B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
FR3070081A1 (fr) | 2019-02-15 |
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Effective date: 20190215 |
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CA | Change of address |
Effective date: 20230124 |
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Owner name: IDEMIA IDENTITY & SECURITY FRANCE, FR Effective date: 20230124 |
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Year of fee payment: 7 |