FR3072494B1 - Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables - Google Patents

Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables Download PDF

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Publication number
FR3072494B1
FR3072494B1 FR1759765A FR1759765A FR3072494B1 FR 3072494 B1 FR3072494 B1 FR 3072494B1 FR 1759765 A FR1759765 A FR 1759765A FR 1759765 A FR1759765 A FR 1759765A FR 3072494 B1 FR3072494 B1 FR 3072494B1
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FR
France
Prior art keywords
volatile memories
retention
controlling data
page
cooling cycles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1759765A
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English (en)
Other versions
FR3072494A1 (fr
Inventor
Valentin Gherman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1759765A priority Critical patent/FR3072494B1/fr
Priority to PCT/EP2018/076565 priority patent/WO2019076613A1/fr
Priority to EP18782028.7A priority patent/EP3698364A1/fr
Priority to US16/756,837 priority patent/US10990477B2/en
Publication of FR3072494A1 publication Critical patent/FR3072494A1/fr
Application granted granted Critical
Publication of FR3072494B1 publication Critical patent/FR3072494B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/004—Error avoidance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0033—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0035—Evaluating degradation, retention or wearout, e.g. by counting writing cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/008—Reliability or availability analysis
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409—Online test
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411—Online error correction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

L'invention porte sur un procédé pour contrôler le rafraichissement de données dans des mémoires non-volatiles reprogrammables, ayant pluralité de pages mémoire pour stocker des données. Le procédé opère selon les étapes consistant à : - calculer le nombre d'erreurs de rétention et d'erreurs de non-rétention dans au moins une page mémoire; - calculer l'âge de rétention de ladite au moins une page mémoire ; - estimer le temps de rétention restant pour ladite page en fonction des paramètres précédemment calculés ; et - déterminer si la page doit être rafraichie ou non en fonction de la valeur estimée du temps de rétention restant.
FR1759765A 2017-10-18 2017-10-18 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables Expired - Fee Related FR3072494B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1759765A FR3072494B1 (fr) 2017-10-18 2017-10-18 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables
PCT/EP2018/076565 WO2019076613A1 (fr) 2017-10-18 2018-10-01 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables
EP18782028.7A EP3698364A1 (fr) 2017-10-18 2018-10-01 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables
US16/756,837 US10990477B2 (en) 2017-10-18 2018-10-01 Device and method for controlling the data refresh cycles in reprogrammable non-volatile memories

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1759765A FR3072494B1 (fr) 2017-10-18 2017-10-18 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables
FR1759765 2017-10-18

Publications (2)

Publication Number Publication Date
FR3072494A1 FR3072494A1 (fr) 2019-04-19
FR3072494B1 true FR3072494B1 (fr) 2020-06-19

Family

ID=61599273

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1759765A Expired - Fee Related FR3072494B1 (fr) 2017-10-18 2017-10-18 Dispositif et procede de controle des cycles de rafraichissement de donnees dans des memoires non-volatiles reprogrammables

Country Status (4)

Country Link
US (1) US10990477B2 (fr)
EP (1) EP3698364A1 (fr)
FR (1) FR3072494B1 (fr)
WO (1) WO2019076613A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110689914B (zh) * 2019-09-06 2021-08-10 苏州浪潮智能科技有限公司 一种固态硬盘的读纠错方法、装置、设备及存储介质
US11157379B2 (en) 2019-10-30 2021-10-26 International Business Machines Corporation Managing blocks of memory based on block health using hybrid controllers
TWI764856B (zh) * 2021-12-13 2022-05-11 慧榮科技股份有限公司 記憶體控制器與資料處理方法
CN116469442B (zh) * 2022-03-23 2024-05-03 武汉置富半导体技术有限公司 芯片数据保持时间的预测方法、装置及存储介质

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8938655B2 (en) * 2007-12-20 2015-01-20 Spansion Llc Extending flash memory data retension via rewrite refresh
US9330767B1 (en) * 2009-08-26 2016-05-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Flash memory module and method for programming a page of flash memory cells
US8661184B2 (en) * 2010-01-27 2014-02-25 Fusion-Io, Inc. Managing non-volatile media
US9805813B2 (en) * 2013-08-30 2017-10-31 Empire Technology Development Llc Reduction of power consumption in flash memory
US9959059B2 (en) * 2014-10-20 2018-05-01 Sandisk Technologies Llc Storage error management
US20160179428A1 (en) * 2014-12-22 2016-06-23 Sandisk Technologies Inc. Dynamic programming adjustments in memory for non-critical or low power mode tasks

Also Published As

Publication number Publication date
US10990477B2 (en) 2021-04-27
FR3072494A1 (fr) 2019-04-19
WO2019076613A1 (fr) 2019-04-25
EP3698364A1 (fr) 2020-08-26
US20200264952A1 (en) 2020-08-20

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