FR3059825B1 - METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - Google Patents

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Download PDF

Info

Publication number
FR3059825B1
FR3059825B1 FR1662007A FR1662007A FR3059825B1 FR 3059825 B1 FR3059825 B1 FR 3059825B1 FR 1662007 A FR1662007 A FR 1662007A FR 1662007 A FR1662007 A FR 1662007A FR 3059825 B1 FR3059825 B1 FR 3059825B1
Authority
FR
France
Prior art keywords
semiconductor device
face
plate
generating
treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1662007A
Other languages
French (fr)
Other versions
FR3059825A1 (en
Inventor
Etienne Drahi
Gilles POULAIN
Sergej Filonovich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institut Photovoltaique D'ile De France Ipvf Fr
Electricite de France SA
Centre National de la Recherche Scientifique CNRS
Ecole Polytechnique
LAir Liquide SA pour lEtude et lExploitation des Procedes Georges Claude
TotalEnergies Onetech SAS
Original Assignee
Electricite de France SA
Centre National de la Recherche Scientifique CNRS
Ecole Polytechnique
Air Liquide SA
Total SE
LAir Liquide SA pour lEtude et lExploitation des Procedes Georges Claude
Institut Photovoltaique dIle de France IPVF
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electricite de France SA, Centre National de la Recherche Scientifique CNRS, Ecole Polytechnique, Air Liquide SA, Total SE, LAir Liquide SA pour lEtude et lExploitation des Procedes Georges Claude, Institut Photovoltaique dIle de France IPVF filed Critical Electricite de France SA
Priority to FR1662007A priority Critical patent/FR3059825B1/en
Priority to PCT/FR2017/053394 priority patent/WO2018104650A1/en
Publication of FR3059825A1 publication Critical patent/FR3059825A1/en
Application granted granted Critical
Publication of FR3059825B1 publication Critical patent/FR3059825B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Plasma & Fusion (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Drying Of Semiconductors (AREA)
  • Photovoltaic Devices (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un dispositif à semi-conducteur comprenant les étapes suivantes : a) positionnement d'une plaque (1) de matériau semi-conducteur cristallin à l'intérieur d'une enceinte à vide d'un réacteur de traitement par plasma à couplage capacitif, la plaque (1) ayant une première face (11) et une deuxième face (12), la plaque (1) ayant des défauts de surface produits par sciage; k) traitement de gravure par plasma de la première face (11), de manière à générer une zone gravée (111, 112) à sec sur la première face (11); d) traitement assisté par plasma pour générer une zone nano-texturée (113); e) traitement de passivation à sec pour générer une zone nano-texturée passivée (114) sur la première face (11). L'invention concerne aussi un dispositif à semi-conducteur ainsi obtenu.The invention relates to a method of manufacturing a semiconductor device comprising the following steps: a) positioning a plate (1) of crystalline semiconductor material inside a vacuum chamber of a capacitively coupled plasma processing reactor, the plate (1) having a first face (11) and a second face (12), the plate (1) having surface defects produced by sawing; k) plasma etching treatment of the first face (11), so as to generate an etched area (111, 112) dry on the first face (11); d) plasma-assisted treatment for generating a nano-textured area (113); e) dry passivation treatment for generating a passivated nano-textured zone (114) on the first face (11). The invention also relates to a semiconductor device thus obtained.

FR1662007A 2016-12-06 2016-12-06 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Active FR3059825B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1662007A FR3059825B1 (en) 2016-12-06 2016-12-06 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
PCT/FR2017/053394 WO2018104650A1 (en) 2016-12-06 2017-12-05 Method for producing a semiconductor device and semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1662007A FR3059825B1 (en) 2016-12-06 2016-12-06 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
FR1662007 2016-12-06

Publications (2)

Publication Number Publication Date
FR3059825A1 FR3059825A1 (en) 2018-06-08
FR3059825B1 true FR3059825B1 (en) 2019-05-24

Family

ID=59070703

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1662007A Active FR3059825B1 (en) 2016-12-06 2016-12-06 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

Country Status (2)

Country Link
FR (1) FR3059825B1 (en)
WO (1) WO2018104650A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006042617B4 (en) * 2006-09-05 2010-04-08 Q-Cells Se Method for generating local contacts
US20130295712A1 (en) * 2012-05-03 2013-11-07 Advanced Technology Materials, Inc. Methods of texturing surfaces for controlled reflection
KR20140029563A (en) * 2012-08-28 2014-03-11 엘지전자 주식회사 Manufacturing method of solar cell

Also Published As

Publication number Publication date
WO2018104650A1 (en) 2018-06-14
FR3059825A1 (en) 2018-06-08

Similar Documents

Publication Publication Date Title
KR101925957B1 (en) Hybrid laser and plasma etch wafer dicing using substrate carrier
KR102477122B1 (en) Proximity contact cover ring for plasma dicing
US9236284B2 (en) Cooled tape frame lift and low contact shadow ring for plasma heat isolation
WO2012125560A3 (en) Method and apparatus for plasma dicing a semi-conductor wafer
WO2018222403A3 (en) Water-free etching methods
TW200741838A (en) Manufacturing method of semiconductor chips
WO2018052477A3 (en) An integrated method for wafer outgassing reduction
TW200605195A (en) Production method of compound semiconductor device wafer
TW201614106A (en) Plasma-free metal etch
WO2017151254A3 (en) Hybrid wafer dicing approach using a split beam laser scribing process and plasma etch process
DE60331557D1 (en) DRING USE IN A PLASMA PROCESSING CHAMBER
WO2009125951A3 (en) Plasma processing apparatus and method for plasma processing
WO2013098702A3 (en) Mixed mode pulsing etching in plasma processing systems
TW200731410A (en) Manufacturing method of semiconductor apparatus and surface processing method of SiN and SiO2 film
US9293304B2 (en) Plasma thermal shield for heat dissipation in plasma chamber
WO2012173759A3 (en) In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US20150162244A1 (en) Method and carrier for dicing a wafer
TW200627541A (en) Focus ring, plasma etching apparatus and plasma etching method
TW201130082A (en) Focus ring of plasma processing apparatus and plasma processing apparatus having the same
WO2012170150A3 (en) Selective deposition of polymer films on bare silicon instead of oxide surface
WO2008082923A3 (en) Methods and apparatus for wafer edge processing
WO2015134200A3 (en) Baking tool for improved wafer coating process
FR3059825B1 (en) METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
TWI666729B (en) Hybrid wafer dicing approach using an ultra-short pulsed laguerre gauss beam laser scribing process and plasma etch process
EP2573803A4 (en) Silicon nitride film for semiconductor element, and method and apparatus for manufacturing silicon nitride film

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20180608

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 6

PLFP Fee payment

Year of fee payment: 7

TQ Partial transmission of property

Owner name: TOTALENERGIES ONETECH, FR

Effective date: 20230525

Owner name: L'AIR LIQUIDE SOCIETE ANONYME POUR L'ETUDE ET , FR

Effective date: 20230525

Owner name: INSTITUT PHOTOVOLTAIQUE D'ILE DE FRANCE - IPVF, FR

Effective date: 20230525

Owner name: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, FR

Effective date: 20230525

Owner name: ECOLE POLYTECHNIQUE, FR

Effective date: 20230525

Owner name: ELECTRICITE DE FRANCE, FR

Effective date: 20230525

PLFP Fee payment

Year of fee payment: 8