FR3055734B1 - Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire. - Google Patents

Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire. Download PDF

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Publication number
FR3055734B1
FR3055734B1 FR1658232A FR1658232A FR3055734B1 FR 3055734 B1 FR3055734 B1 FR 3055734B1 FR 1658232 A FR1658232 A FR 1658232A FR 1658232 A FR1658232 A FR 1658232A FR 3055734 B1 FR3055734 B1 FR 3055734B1
Authority
FR
France
Prior art keywords
memory
data
electromagnetic interference
during transfer
interference during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1658232A
Other languages
English (en)
Other versions
FR3055734A1 (fr
Inventor
Abdelaziz Goulahsen
Patrice Derouet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
STMicroelectronics Grand Ouest SAS
Original Assignee
STMicroelectronics Grenoble 2 SAS
STMicroelectronics Grand Ouest SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Grenoble 2 SAS, STMicroelectronics Grand Ouest SAS filed Critical STMicroelectronics Grenoble 2 SAS
Priority to FR1658232A priority Critical patent/FR3055734B1/fr
Priority to US15/444,558 priority patent/US10558587B2/en
Priority to CN201710154288.1A priority patent/CN107799140B/zh
Publication of FR3055734A1 publication Critical patent/FR3055734A1/fr
Application granted granted Critical
Publication of FR3055734B1 publication Critical patent/FR3055734B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/12—Transmitting and receiving encryption devices synchronised or initially set up in a particular manner

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
  • Dram (AREA)
FR1658232A 2016-09-05 2016-09-05 Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire. Expired - Fee Related FR3055734B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1658232A FR3055734B1 (fr) 2016-09-05 2016-09-05 Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire.
US15/444,558 US10558587B2 (en) 2016-09-05 2017-02-28 Method and device for transfer of data to or from a memory
CN201710154288.1A CN107799140B (zh) 2016-09-05 2017-03-15 用于向或从存储器传送数据的方法和装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1658232 2016-09-05
FR1658232A FR3055734B1 (fr) 2016-09-05 2016-09-05 Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire.

Publications (2)

Publication Number Publication Date
FR3055734A1 FR3055734A1 (fr) 2018-03-09
FR3055734B1 true FR3055734B1 (fr) 2018-09-28

Family

ID=57906696

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1658232A Expired - Fee Related FR3055734B1 (fr) 2016-09-05 2016-09-05 Procede et dispositif d'attenuation d'interferences electromagnetiques lors d'un transfert de donnees depuis ou vers une memoire.

Country Status (3)

Country Link
US (1) US10558587B2 (fr)
CN (1) CN107799140B (fr)
FR (1) FR3055734B1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102091524B1 (ko) * 2018-07-23 2020-03-23 삼성전자주식회사 어드레스를 스크램블하는 메모리 장치
US11113422B2 (en) * 2018-08-03 2021-09-07 Micron Technology, Inc. Data protection in computer processors
CN110362516B (zh) * 2019-07-23 2020-11-10 南京凯鼎电子科技有限公司 一种提高ddr存储总线利用率的方法和装置
TWI774183B (zh) * 2021-01-08 2022-08-11 瑞昱半導體股份有限公司 具有位址打亂機制的記憶體存取裝置及其記憶體存取方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080098234A1 (en) * 2006-10-20 2008-04-24 Honeywell International Inc. Fault-containment and/or failure detection using encryption
WO2008110985A1 (fr) * 2007-03-13 2008-09-18 Nxp B.V. Chiffrement et déchiffrement d'un ensemble de données dans au moins deux dimensions
US7945050B2 (en) 2007-09-28 2011-05-17 Intel Corporation Suppressing power supply noise using data scrambling in double data rate memory systems
EP2413305B1 (fr) * 2009-03-23 2019-06-26 Fujitsu Limited Dispositif et procédé de traitement de données
US8549367B1 (en) * 2010-12-29 2013-10-01 Cadence Design Systems, Inc. Method and system for accelerating memory randomization
US20130262623A1 (en) * 2012-03-31 2013-10-03 David Hardy Nall Method and apparatus for providing services to clients of static or dynamic hardware.
US9483664B2 (en) * 2014-09-15 2016-11-01 Arm Limited Address dependent data encryption

Also Published As

Publication number Publication date
US10558587B2 (en) 2020-02-11
CN107799140A (zh) 2018-03-13
US20180067872A1 (en) 2018-03-08
CN107799140B (zh) 2021-03-16
FR3055734A1 (fr) 2018-03-09

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