FR3035265B1 - Procede de fabrication de transistors soi pour une densite d'integration accrue - Google Patents

Procede de fabrication de transistors soi pour une densite d'integration accrue Download PDF

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Publication number
FR3035265B1
FR3035265B1 FR1553376A FR1553376A FR3035265B1 FR 3035265 B1 FR3035265 B1 FR 3035265B1 FR 1553376 A FR1553376 A FR 1553376A FR 1553376 A FR1553376 A FR 1553376A FR 3035265 B1 FR3035265 B1 FR 3035265B1
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Prior art keywords
integration density
soi transistors
increased integration
manufacturing soi
manufacturing
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FR1553376A
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FR3035265A1 (fr
Inventor
Francois Andrieu
Denis Rideau
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Priority to FR1553376A priority Critical patent/FR3035265B1/fr
Priority to US15/099,892 priority patent/US9514996B2/en
Publication of FR3035265A1 publication Critical patent/FR3035265A1/fr
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    • H—ELECTRICITY
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    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
FR1553376A 2015-04-16 2015-04-16 Procede de fabrication de transistors soi pour une densite d'integration accrue Active FR3035265B1 (fr)

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Application Number Priority Date Filing Date Title
FR1553376A FR3035265B1 (fr) 2015-04-16 2015-04-16 Procede de fabrication de transistors soi pour une densite d'integration accrue
US15/099,892 US9514996B2 (en) 2015-04-16 2016-04-15 Process for fabricating SOI transistors for an increased integration density

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Application Number Priority Date Filing Date Title
FR1553376 2015-04-16
FR1553376A FR3035265B1 (fr) 2015-04-16 2015-04-16 Procede de fabrication de transistors soi pour une densite d'integration accrue

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FR3035265B1 true FR3035265B1 (fr) 2018-02-16

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FR3059150B1 (fr) 2016-11-18 2019-05-10 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de realisation d'un transistor fet a grille debordante
JP6955696B2 (ja) * 2017-12-28 2021-10-27 Jnc株式会社 二次電池負極用組成物並びにこれを用いた二次電池用負極及び二次電池

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US8552500B2 (en) * 2011-05-24 2013-10-08 International Business Machines Corporation Structure for CMOS ETSOI with multiple threshold voltages and active well bias capability
US8432002B2 (en) * 2011-06-28 2013-04-30 International Business Machines Corporation Method and structure for low resistive source and drain regions in a replacement metal gate process flow
FR2980640B1 (fr) * 2011-09-26 2014-05-02 Commissariat Energie Atomique Circuit integre en technologie fdsoi avec partage de caisson et moyens de polarisation des plans de masse de dopage opposes presents dans un meme caisson
US9269804B2 (en) * 2012-07-28 2016-02-23 Semiwise Limited Gate recessed FDSOI transistor with sandwich of active and etch control layers

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