FR3027128B1 - Appareil, systemes et procedes pour fournir une memoire cache a gestion efficace de la memoire - Google Patents

Appareil, systemes et procedes pour fournir une memoire cache a gestion efficace de la memoire Download PDF

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Publication number
FR3027128B1
FR3027128B1 FR1559545A FR1559545A FR3027128B1 FR 3027128 B1 FR3027128 B1 FR 3027128B1 FR 1559545 A FR1559545 A FR 1559545A FR 1559545 A FR1559545 A FR 1559545A FR 3027128 B1 FR3027128 B1 FR 3027128B1
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memory
systems
methods
recently used
providing
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FR1559545A
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FR3027128A1 (fr
Inventor
Kanishk Rastogi
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Western Digital Technologies Inc
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HGST Netherlands BV
Western Digital Technologies Inc
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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0871—Allocation or management of cache space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/122—Replacement control using replacement algorithms of the least frequently used [LFU] type, e.g. with individual count value
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • G06F12/127—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning using additional replacement algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G06F9/467—Transactional memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G06F2212/1044—Space efficiency improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/22—Employing cache memory using specific memory technology
    • G06F2212/225—Hybrid cache memory, e.g. having both volatile and non-volatile portions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/313—In storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

La présente invention concerne un appareil, des systèmes et des procédés mettant en œuvre un mécanisme de suppression des données moins fréquemment utilisées pour identifier un bloc de mémoire d'une mémoire cache en vue de le supprimer. Le mécanisme moins fréquemment utilisé peut présenter un mode de fonctionnement similaire au mécanisme de suppression des données les moins récemment utilisées tout en nécessitant l'utilisation d'un mémoire moindre. Un contrôleur de mémoire peut mettre en œuvre le mécanisme de suppression des données moins récemment utilisées par la sélection d'un bloc de mémoire et la détermination de si oui ou non le bloc de mémoire est un des blocs de mémoire moins récemment utilisés. Si c'est le cas, le contrôleur de mémoire peut supprimer les données dans le bloc de mémoire sélectionné ; si ce n'est pas le cas, le contrôleur de mémoire peut poursuivre pour sélectionner d'autres blocs de mémoire jusqu'à ce que le contrôleur de mémoire sélectionne un des blocs de mémoire moins récemment utilisés.
FR1559545A 2014-10-08 2015-10-07 Appareil, systemes et procedes pour fournir une memoire cache a gestion efficace de la memoire Active FR3027128B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14509597 2014-10-08
US14/509,597 US9501419B2 (en) 2014-10-08 2014-10-08 Apparatus, systems, and methods for providing a memory efficient cache

Publications (2)

Publication Number Publication Date
FR3027128A1 FR3027128A1 (fr) 2016-04-15
FR3027128B1 true FR3027128B1 (fr) 2019-04-26

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FR1559545A Active FR3027128B1 (fr) 2014-10-08 2015-10-07 Appareil, systemes et procedes pour fournir une memoire cache a gestion efficace de la memoire

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US (1) US9501419B2 (fr)
DE (1) DE102015013125A1 (fr)
FR (1) FR3027128B1 (fr)
GB (1) GB2533992B (fr)

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WO2019147288A1 (fr) * 2018-01-29 2019-08-01 Hewlett-Packard Development Company, L.P. Protection de données dans un environnement de pré-système d'exploitation
US11288211B2 (en) * 2019-11-01 2022-03-29 EMC IP Holding Company LLC Methods and systems for optimizing storage resources
US11409696B2 (en) 2019-11-01 2022-08-09 EMC IP Holding Company LLC Methods and systems for utilizing a unified namespace
US11294725B2 (en) 2019-11-01 2022-04-05 EMC IP Holding Company LLC Method and system for identifying a preferred thread pool associated with a file system
US11150845B2 (en) 2019-11-01 2021-10-19 EMC IP Holding Company LLC Methods and systems for servicing data requests in a multi-node system
US11288238B2 (en) 2019-11-01 2022-03-29 EMC IP Holding Company LLC Methods and systems for logging data transactions and managing hash tables
US11392464B2 (en) 2019-11-01 2022-07-19 EMC IP Holding Company LLC Methods and systems for mirroring and failover of nodes
US11741056B2 (en) 2019-11-01 2023-08-29 EMC IP Holding Company LLC Methods and systems for allocating free space in a sparse file system
US20210240524A1 (en) * 2020-01-31 2021-08-05 Qualcomm Incorporated Methods and apparatus to facilitate tile-based gpu machine learning acceleration
US11893279B2 (en) * 2021-08-25 2024-02-06 Micron Technology, Inc. Access tracking in memory
US20240134801A1 (en) * 2022-10-19 2024-04-25 Samsung Electronics Co., Ltd. Methods and system for efficient access to solid state drive

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Also Published As

Publication number Publication date
GB2533992B (en) 2017-03-08
US20160103765A1 (en) 2016-04-14
FR3027128A1 (fr) 2016-04-15
DE102015013125A1 (de) 2016-04-14
GB2533992A (en) 2016-07-13
GB201517712D0 (en) 2015-11-18
US9501419B2 (en) 2016-11-22

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