FR3013869B1 - Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede - Google Patents

Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede

Info

Publication number
FR3013869B1
FR3013869B1 FR1302695A FR1302695A FR3013869B1 FR 3013869 B1 FR3013869 B1 FR 3013869B1 FR 1302695 A FR1302695 A FR 1302695A FR 1302695 A FR1302695 A FR 1302695A FR 3013869 B1 FR3013869 B1 FR 3013869B1
Authority
FR
France
Prior art keywords
value
data
implementing
processor
stack pointer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1302695A
Other languages
English (en)
Other versions
FR3013869A1 (fr
Inventor
Philippe Grossi
Dominique David
Francois Brun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR1302695A priority Critical patent/FR3013869B1/fr
Priority to US14/550,834 priority patent/US9513911B2/en
Publication of FR3013869A1 publication Critical patent/FR3013869A1/fr
Application granted granted Critical
Publication of FR3013869B1 publication Critical patent/FR3013869B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

Procédé de détection des débordements de pile comportant les étapes suivantes : A. stocker dans au moins un registre dédié au moins une donnée choisie parmi : une donnée (SPHaut) indicative d'une valeur maximale autorisée pour un pointeur de pile, et une donnée (SPBas) indicative d'une valeur minimale autorisée pour ledit pointeur de pile ; B. effectuer une comparaison entre une valeur actuelle (SP) ou passée (SPMin, SPMax) dudit pointeur de pile et ladite ou chaque dite donnée ; et C. générer une exception de débordement de pile si ladite comparaison indique que ladite valeur actuelle ou passée dudit pointeur de pile est supérieure à ladite valeur maximale autorisée ou inférieure à ladite valeur minimale autorisée. Processeur pour la mise en œuvre d'un tel procédé.
FR1302695A 2013-11-22 2013-11-22 Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede Active FR3013869B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1302695A FR3013869B1 (fr) 2013-11-22 2013-11-22 Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede
US14/550,834 US9513911B2 (en) 2013-11-22 2014-11-21 Method of detecting stack overflows and processor for implementing such a method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1302695A FR3013869B1 (fr) 2013-11-22 2013-11-22 Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede

Publications (2)

Publication Number Publication Date
FR3013869A1 FR3013869A1 (fr) 2015-05-29
FR3013869B1 true FR3013869B1 (fr) 2016-01-01

Family

ID=50543079

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1302695A Active FR3013869B1 (fr) 2013-11-22 2013-11-22 Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede

Country Status (2)

Country Link
US (1) US9513911B2 (fr)
FR (1) FR3013869B1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10019395B2 (en) * 2013-11-08 2018-07-10 Nxp Usa, Inc. Processing system with stack management and method for stack management
FR3013869B1 (fr) * 2013-11-22 2016-01-01 Thales Sa Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede
US20160381050A1 (en) * 2015-06-26 2016-12-29 Intel Corporation Processors, methods, systems, and instructions to protect shadow stacks
US10394556B2 (en) 2015-12-20 2019-08-27 Intel Corporation Hardware apparatuses and methods to switch shadow stack pointers
US10430580B2 (en) 2016-02-04 2019-10-01 Intel Corporation Processor extensions to protect stacks during ring transitions
US9904485B2 (en) * 2016-03-31 2018-02-27 Intel Corporation Secure memory controller
US11237828B2 (en) * 2016-04-26 2022-02-01 Onnivation, LLC Secure matrix space with partitions for concurrent use
CN107391252A (zh) * 2016-05-16 2017-11-24 阿里巴巴集团控股有限公司 一种资源处理方法及装置
US10649786B2 (en) * 2016-12-01 2020-05-12 Cisco Technology, Inc. Reduced stack usage in a multithreaded processor
US10114573B1 (en) * 2017-04-26 2018-10-30 International Business Machines Corporation Dynamic reduction of stack-overflow errors in a recursive data-serialization algorithm
CN109558734B (zh) * 2018-11-28 2021-10-15 北京梆梆安全科技有限公司 一种堆栈安全性的检测方法及装置、移动设备
WO2022260661A1 (fr) * 2021-06-08 2022-12-15 Zeku, Inc. Circuit de surveillance de pointeur de pile servant à déclencher un service d'interruption au niveau d'un fichier de registre

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4530049A (en) * 1982-02-11 1985-07-16 At&T Bell Laboratories Stack cache with fixed size stack frames
US4835738A (en) * 1986-03-31 1989-05-30 Texas Instruments Incorporated Register stack for a bit slice processor microsequencer
DE69816775T2 (de) * 1997-08-18 2004-05-27 Koninklijke Philips Electronics N.V. Vorrichtung zur datenverarbeitung mit stapelstruktur
US6526463B1 (en) * 2000-04-14 2003-02-25 Koninklijke Philips Electronics N.V. Dynamically selectable stack frame size for processor interrupts
EP1197847A3 (fr) * 2000-10-10 2003-05-21 Nazomi Communications Inc. Accélérateur Java en hardware avec machine à microcode
US10353797B2 (en) * 2006-12-29 2019-07-16 International Business Machines Corporation Using memory tracking data to inform a memory map tool
KR101334172B1 (ko) * 2007-01-05 2013-11-28 삼성전자주식회사 임베디드 시스템의 스택 오버플로우 방지 방법 및 장치
US7962729B2 (en) * 2009-01-05 2011-06-14 International Business Machines Corporation Dynamic runtime range checking of different types on a register using upper and lower bound value registers for the register
US9229721B2 (en) * 2012-09-10 2016-01-05 Qualcomm Incorporated Executing subroutines in a multi-threaded processing system
FR3013869B1 (fr) * 2013-11-22 2016-01-01 Thales Sa Procede de detection des debordements de pile et processeur pour la mise en oeuvre d'un tel procede

Also Published As

Publication number Publication date
US20150150024A1 (en) 2015-05-28
US9513911B2 (en) 2016-12-06
FR3013869A1 (fr) 2015-05-29

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