FR3007193B1 - Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe - Google Patents

Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe

Info

Publication number
FR3007193B1
FR3007193B1 FR1355677A FR1355677A FR3007193B1 FR 3007193 B1 FR3007193 B1 FR 3007193B1 FR 1355677 A FR1355677 A FR 1355677A FR 1355677 A FR1355677 A FR 1355677A FR 3007193 B1 FR3007193 B1 FR 3007193B1
Authority
FR
France
Prior art keywords
semiconductor material
material including
making same
different crystalline
crystalline orientations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1355677A
Other languages
English (en)
Other versions
FR3007193A1 (fr
Inventor
Jean-Pierre Faurie
Bernard Beaumont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Saint Gobain Lumilog SAS
Original Assignee
Saint Gobain Lumilog SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Saint Gobain Lumilog SAS filed Critical Saint Gobain Lumilog SAS
Priority to FR1355677A priority Critical patent/FR3007193B1/fr
Priority to US14/900,088 priority patent/US9882087B2/en
Priority to EP14731271.4A priority patent/EP3011586A1/fr
Priority to TW103121104A priority patent/TW201511090A/zh
Priority to PCT/EP2014/062847 priority patent/WO2014202679A1/fr
Publication of FR3007193A1 publication Critical patent/FR3007193A1/fr
Application granted granted Critical
Publication of FR3007193B1 publication Critical patent/FR3007193B1/fr
Priority to US15/865,065 priority patent/US10497833B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
FR1355677A 2013-06-18 2013-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe Expired - Fee Related FR3007193B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR1355677A FR3007193B1 (fr) 2013-06-18 2013-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe
US14/900,088 US9882087B2 (en) 2013-06-18 2014-06-18 Semiconductor material including different crystalline orientation zones and related production process
EP14731271.4A EP3011586A1 (fr) 2013-06-18 2014-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe
TW103121104A TW201511090A (zh) 2013-06-18 2014-06-18 包含不同結晶取向區之半導體材料及其相關製造方法
PCT/EP2014/062847 WO2014202679A1 (fr) 2013-06-18 2014-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe
US15/865,065 US10497833B2 (en) 2013-06-18 2018-01-08 Semiconductor material including different crystalline orientation zones and related production process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1355677A FR3007193B1 (fr) 2013-06-18 2013-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe

Publications (2)

Publication Number Publication Date
FR3007193A1 FR3007193A1 (fr) 2014-12-19
FR3007193B1 true FR3007193B1 (fr) 2016-12-09

Family

ID=49546503

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1355677A Expired - Fee Related FR3007193B1 (fr) 2013-06-18 2013-06-18 Materiau semi-conducteur incluant des zones d'orientations cristallines differentes et procede de realisation associe

Country Status (5)

Country Link
US (2) US9882087B2 (fr)
EP (1) EP3011586A1 (fr)
FR (1) FR3007193B1 (fr)
TW (1) TW201511090A (fr)
WO (1) WO2014202679A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180358221A1 (en) * 2017-06-07 2018-12-13 Macom Technology Solutions Holdings, Inc. Reduction of wafer bow during growth of epitaxial films
KR102404060B1 (ko) * 2018-01-11 2022-06-02 삼성전자주식회사 캐패시터를 갖는 반도체 소자 및 그 형성 방법
CN112133632A (zh) * 2020-09-16 2020-12-25 深圳市汇芯通信技术有限公司 减少高电子迁移率晶体管hemt应力的方法及hemt
EP4044216A1 (fr) * 2021-02-16 2022-08-17 Siltronic AG Procédé pour tester la robustesse de contrainte d'un substrat semi-conducteur
CN113281921A (zh) * 2021-05-07 2021-08-20 三明学院 一种一阶电光效应硅调制器及其制备工艺

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2860248B1 (fr) * 2003-09-26 2006-02-17 Centre Nat Rech Scient Procede de realisation de substrats autosupportes de nitrures d'elements iii par hetero-epitaxie sur une couche sacrificielle
KR100773555B1 (ko) * 2006-07-21 2007-11-06 삼성전자주식회사 저결함 반도체 기판 및 그 제조방법
WO2011129246A1 (fr) * 2010-04-13 2011-10-20 並木精密宝石株式会社 Substrat monocristallin, substrat monocristallin à film cristallin, film cristallin, procédé pour la production de substrat monocristallin à film monocristallin, procédé pour la production de substrat cristallin, et procédé de production d'élément
US9224904B1 (en) * 2011-07-24 2015-12-29 Ananda Kumar Composite substrates of silicon and ceramic

Also Published As

Publication number Publication date
FR3007193A1 (fr) 2014-12-19
WO2014202679A1 (fr) 2014-12-24
US9882087B2 (en) 2018-01-30
US10497833B2 (en) 2019-12-03
EP3011586A1 (fr) 2016-04-27
TW201511090A (zh) 2015-03-16
US20160149083A1 (en) 2016-05-26
US20180219129A1 (en) 2018-08-02

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