FR2989504B1 - Registre protege contre des attaques par injection de fautes - Google Patents

Registre protege contre des attaques par injection de fautes

Info

Publication number
FR2989504B1
FR2989504B1 FR1253354A FR1253354A FR2989504B1 FR 2989504 B1 FR2989504 B1 FR 2989504B1 FR 1253354 A FR1253354 A FR 1253354A FR 1253354 A FR1253354 A FR 1253354A FR 2989504 B1 FR2989504 B1 FR 2989504B1
Authority
FR
France
Prior art keywords
fault injection
injection attacks
register protected
register
protected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1253354A
Other languages
English (en)
Other versions
FR2989504A1 (fr
Inventor
Frederic Bancel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1253354A priority Critical patent/FR2989504B1/fr
Priority to US13/789,424 priority patent/US9021316B2/en
Publication of FR2989504A1 publication Critical patent/FR2989504A1/fr
Application granted granted Critical
Publication of FR2989504B1 publication Critical patent/FR2989504B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125Cells incorporating circuit means for protecting against loss of information
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Storage Device Security (AREA)
FR1253354A 2012-04-12 2012-04-12 Registre protege contre des attaques par injection de fautes Expired - Fee Related FR2989504B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1253354A FR2989504B1 (fr) 2012-04-12 2012-04-12 Registre protege contre des attaques par injection de fautes
US13/789,424 US9021316B2 (en) 2012-04-12 2013-03-07 Register protected against fault attacks

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1253354A FR2989504B1 (fr) 2012-04-12 2012-04-12 Registre protege contre des attaques par injection de fautes

Publications (2)

Publication Number Publication Date
FR2989504A1 FR2989504A1 (fr) 2013-10-18
FR2989504B1 true FR2989504B1 (fr) 2014-04-25

Family

ID=47227878

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1253354A Expired - Fee Related FR2989504B1 (fr) 2012-04-12 2012-04-12 Registre protege contre des attaques par injection de fautes

Country Status (2)

Country Link
US (1) US9021316B2 (fr)
FR (1) FR2989504B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9583218B1 (en) * 2014-01-24 2017-02-28 Altera Corporation Configurable register circuitry for error detection and recovery
US9817738B2 (en) * 2015-09-04 2017-11-14 Intel Corporation Clearing poison status on read accesses to volatile memory regions allocated in non-volatile memory
US10197726B2 (en) * 2017-06-22 2019-02-05 Corning Incorporated Wide-band multimode optical fibers with cores having a radially-dependent alpha profile
KR102510451B1 (ko) 2018-05-09 2023-03-16 삼성전자주식회사 집적 회로 장치 및 집적 회로 장치의 동작 방법
US10733327B2 (en) * 2018-06-26 2020-08-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method and apparatus for protecting a PUF generator
US10963329B2 (en) * 2018-10-17 2021-03-30 Omnivision Technologies, Inc. Universal register read back
DE102019128331B4 (de) * 2019-08-29 2024-10-02 Taiwan Semiconductor Manufacturing Co., Ltd. Gemeinsam genutzter decodiererschaltkreis und verfahren
CN115229988B (zh) * 2022-08-04 2023-08-15 徐州徐工施维英机械有限公司 一种混凝土搅拌机械骨料上料过程的监测方法及系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR388526A (fr) 1908-03-26 1908-08-14 Tecza Dampf Fabrik Chemischer Machine à laver à la benzine
US4056845A (en) * 1975-04-25 1977-11-01 Data General Corporation Memory access technique
US4999837A (en) * 1989-03-20 1991-03-12 International Business Machines Corporation Programmable channel error injection
FR2840445B1 (fr) * 2002-06-03 2004-09-10 St Microelectronics Sa Circuit memoire comportant un code correcteur d'erreur
DE10254659A1 (de) * 2002-11-22 2004-06-03 Philips Intellectual Property & Standards Gmbh Schaltungsanordnung mit nicht-flüchtigem Speichermodul und Verfahren zum Erfassen von Lichtattacken auf das nicht-flüchtige Speichermodul
US8045381B2 (en) * 2005-05-09 2011-10-25 Stmicroelectronics Sa Device for protecting a memory against attacks by error injection
FR2923923B1 (fr) * 2007-11-19 2009-12-04 St Microelectronics Sa Verification de donnees lues en memoire
FR2959580A1 (fr) * 2010-05-03 2011-11-04 St Microelectronics Rousset Circuit et procede de detection d'une attaque par injection de fautes

Also Published As

Publication number Publication date
US9021316B2 (en) 2015-04-28
FR2989504A1 (fr) 2013-10-18
US20130275817A1 (en) 2013-10-17

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20141231