FR2969817B1 - REALIZING VIAS IN AN INTEGRATED CIRCUIT - Google Patents

REALIZING VIAS IN AN INTEGRATED CIRCUIT

Info

Publication number
FR2969817B1
FR2969817B1 FR1061119A FR1061119A FR2969817B1 FR 2969817 B1 FR2969817 B1 FR 2969817B1 FR 1061119 A FR1061119 A FR 1061119A FR 1061119 A FR1061119 A FR 1061119A FR 2969817 B1 FR2969817 B1 FR 2969817B1
Authority
FR
France
Prior art keywords
vias
realizing
integrated circuit
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1061119A
Other languages
French (fr)
Other versions
FR2969817A1 (en
Inventor
Nicolas Hotellier
Olivier Robin
Catherine Chaton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Crolles 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics Crolles 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics Crolles 2 SAS, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1061119A priority Critical patent/FR2969817B1/en
Publication of FR2969817A1 publication Critical patent/FR2969817A1/en
Application granted granted Critical
Publication of FR2969817B1 publication Critical patent/FR2969817B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
FR1061119A 2010-12-23 2010-12-23 REALIZING VIAS IN AN INTEGRATED CIRCUIT Active FR2969817B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR1061119A FR2969817B1 (en) 2010-12-23 2010-12-23 REALIZING VIAS IN AN INTEGRATED CIRCUIT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1061119A FR2969817B1 (en) 2010-12-23 2010-12-23 REALIZING VIAS IN AN INTEGRATED CIRCUIT

Publications (2)

Publication Number Publication Date
FR2969817A1 FR2969817A1 (en) 2012-06-29
FR2969817B1 true FR2969817B1 (en) 2013-09-27

Family

ID=44310228

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1061119A Active FR2969817B1 (en) 2010-12-23 2010-12-23 REALIZING VIAS IN AN INTEGRATED CIRCUIT

Country Status (1)

Country Link
FR (1) FR2969817B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103280427B (en) * 2013-06-13 2016-08-10 华进半导体封装先导技术研发中心有限公司 A kind of TSV front side end interconnection process

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6541397B1 (en) * 2002-03-29 2003-04-01 Applied Materials, Inc. Removable amorphous carbon CMP stop
JP4904482B2 (en) * 2005-01-18 2012-03-28 国立大学法人東北大学 Semiconductor device
WO2010035379A1 (en) * 2008-09-26 2010-04-01 パナソニック株式会社 Semiconductor device and a method of fabricating the same
JP5537016B2 (en) * 2008-10-27 2014-07-02 株式会社東芝 Semiconductor device and manufacturing method of semiconductor device
US8329578B2 (en) * 2009-03-27 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. Via structure and via etching process of forming the same
US7960282B2 (en) * 2009-05-21 2011-06-14 Globalfoundries Singapore Pte. Ltd. Method of manufacture an integrated circuit system with through silicon via

Also Published As

Publication number Publication date
FR2969817A1 (en) 2012-06-29

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