FR2958076B1 - Procede de formation de vias electriques - Google Patents

Procede de formation de vias electriques

Info

Publication number
FR2958076B1
FR2958076B1 FR1052110A FR1052110A FR2958076B1 FR 2958076 B1 FR2958076 B1 FR 2958076B1 FR 1052110 A FR1052110 A FR 1052110A FR 1052110 A FR1052110 A FR 1052110A FR 2958076 B1 FR2958076 B1 FR 2958076B1
Authority
FR
France
Prior art keywords
forming electric
electric vias
vias
forming
electric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1052110A
Other languages
English (en)
Other versions
FR2958076A1 (fr
Inventor
Richard Fournel
Yves Dodo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
STMicroelectronics Crolles 2 SAS
Original Assignee
STMicroelectronics SA
STMicroelectronics Crolles 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, STMicroelectronics Crolles 2 SAS filed Critical STMicroelectronics SA
Priority to FR1052110A priority Critical patent/FR2958076B1/fr
Priority to US13/070,774 priority patent/US8298942B2/en
Publication of FR2958076A1 publication Critical patent/FR2958076A1/fr
Application granted granted Critical
Publication of FR2958076B1 publication Critical patent/FR2958076B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
FR1052110A 2010-03-24 2010-03-24 Procede de formation de vias electriques Expired - Fee Related FR2958076B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1052110A FR2958076B1 (fr) 2010-03-24 2010-03-24 Procede de formation de vias electriques
US13/070,774 US8298942B2 (en) 2010-03-24 2011-03-24 Method for forming electric vias

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1052110A FR2958076B1 (fr) 2010-03-24 2010-03-24 Procede de formation de vias electriques

Publications (2)

Publication Number Publication Date
FR2958076A1 FR2958076A1 (fr) 2011-09-30
FR2958076B1 true FR2958076B1 (fr) 2012-08-17

Family

ID=42990232

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1052110A Expired - Fee Related FR2958076B1 (fr) 2010-03-24 2010-03-24 Procede de formation de vias electriques

Country Status (2)

Country Link
US (1) US8298942B2 (fr)
FR (1) FR2958076B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8614145B2 (en) * 2011-12-14 2013-12-24 Sematech, Inc. Through substrate via formation processing using sacrificial material
FR3037720A1 (fr) * 2015-06-19 2016-12-23 St Microelectronics Crolles 2 Sas Composant electronique et son procede de fabrication

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5618752A (en) * 1995-06-05 1997-04-08 Harris Corporation Method of fabrication of surface mountable integrated circuits
JP4365750B2 (ja) * 2004-08-20 2009-11-18 ローム株式会社 半導体チップの製造方法、および半導体装置の製造方法
US7396732B2 (en) * 2004-12-17 2008-07-08 Interuniversitair Microelektronica Centrum Vzw (Imec) Formation of deep trench airgaps and related applications
JP5563186B2 (ja) * 2007-03-30 2014-07-30 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法
US7960290B2 (en) * 2007-05-02 2011-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a semiconductor device
US8853830B2 (en) * 2008-05-14 2014-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. System, structure, and method of manufacturing a semiconductor substrate stack
US8138036B2 (en) * 2008-08-08 2012-03-20 International Business Machines Corporation Through silicon via and method of fabricating same
US8035198B2 (en) * 2008-08-08 2011-10-11 International Business Machines Corporation Through wafer via and method of making same
US7923369B2 (en) * 2008-11-25 2011-04-12 Freescale Semiconductor, Inc. Through-via and method of forming
US8242604B2 (en) * 2009-10-28 2012-08-14 International Business Machines Corporation Coaxial through-silicon via
US8492901B2 (en) * 2009-11-06 2013-07-23 International Business Machines Corporation Metal oxide semiconductor (MOS)-compatible high-aspect ratio through-wafer vias and low-stress configuration thereof

Also Published As

Publication number Publication date
FR2958076A1 (fr) 2011-09-30
US20110237068A1 (en) 2011-09-29
US8298942B2 (en) 2012-10-30

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20131129