FR2950209B1 - Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant. - Google Patents

Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant.

Info

Publication number
FR2950209B1
FR2950209B1 FR0956304A FR0956304A FR2950209B1 FR 2950209 B1 FR2950209 B1 FR 2950209B1 FR 0956304 A FR0956304 A FR 0956304A FR 0956304 A FR0956304 A FR 0956304A FR 2950209 B1 FR2950209 B1 FR 2950209B1
Authority
FR
France
Prior art keywords
doublets
ldpc code
output
control node
message
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0956304A
Other languages
English (en)
Other versions
FR2950209A1 (fr
Inventor
Vincent Heinrich
Julien Begey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0956304A priority Critical patent/FR2950209B1/fr
Priority to US12/880,844 priority patent/US8468438B2/en
Publication of FR2950209A1 publication Critical patent/FR2950209A1/fr
Application granted granted Critical
Publication of FR2950209B1 publication Critical patent/FR2950209B1/fr
Priority to US13/919,865 priority patent/US20130283119A1/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1134—Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1171—Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
FR0956304A 2009-09-14 2009-09-14 Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant. Expired - Fee Related FR2950209B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0956304A FR2950209B1 (fr) 2009-09-14 2009-09-14 Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant.
US12/880,844 US8468438B2 (en) 2009-09-14 2010-09-13 Method and apparatus for elementary updating a check node during decoding of a block encoded with a non-binary LDPC code
US13/919,865 US20130283119A1 (en) 2009-09-14 2013-06-17 Method and Apparatus for Elementary Updating a Check Node During Decoding of a Block Encoded with a Non-binary LDPC Code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0956304A FR2950209B1 (fr) 2009-09-14 2009-09-14 Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant.

Publications (2)

Publication Number Publication Date
FR2950209A1 FR2950209A1 (fr) 2011-03-18
FR2950209B1 true FR2950209B1 (fr) 2011-10-14

Family

ID=42133462

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0956304A Expired - Fee Related FR2950209B1 (fr) 2009-09-14 2009-09-14 Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant.

Country Status (2)

Country Link
US (2) US8468438B2 (fr)
FR (1) FR2950209B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102725964B (zh) * 2011-11-17 2014-02-26 华为技术有限公司 一种编码方法、译码方法及编码装置、译码装置
WO2013147777A1 (fr) * 2012-03-28 2013-10-03 Intel Corporation Mise à jour de nœuds variables associés à un décodeur itératif
WO2013147774A1 (fr) * 2012-03-28 2013-10-03 Intel Corporation Traitement de nœuds de contrôle élémentaires d'un décodeur itératif
FR3016259B1 (fr) * 2014-01-07 2017-09-08 Univ Bretagne Sud Procede de gestion d'une unite de calcul de noeud de parite, equipement et logiciel pour la mise en oeuvre du procede
KR102194136B1 (ko) 2014-03-12 2020-12-22 삼성전자주식회사 비이진 ldpc 부호를 이용한 이동 통신 시스템에서 오류 정정 장치 및 방법
US10192311B2 (en) * 2016-08-05 2019-01-29 Qualcomm Incorporated Methods and apparatus for codeword boundary detection for generating depth maps
EP3591845B1 (fr) * 2018-07-05 2023-08-09 Universite De Bretagne Sud Méthodes et appareils de triage pour traitement élémentaire de noeuds de contrôle pour décodage de codes non-binaires par passage de messages
CN113285723B (zh) * 2021-04-26 2022-09-30 武汉梦芯科技有限公司 一种ldpc译码过程中校验节点更新方法、系统及存储介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7747923B2 (en) * 2004-08-26 2010-06-29 Teranetics, Inc. Low-power receiver decoding
US8552835B2 (en) * 2005-10-28 2013-10-08 Mojix, Inc. RFID system with low complexity implementation and pallet coding error correction
US7802165B2 (en) * 2006-08-17 2010-09-21 Lantiq Deutschland Gmbh Decoder system for data encoded with interleaving and redundancy coding
FR2920929B1 (fr) * 2007-09-10 2009-11-13 St Microelectronics Sa Procede et dispositif d'encodage de symboles avec un code du type a controle de parite et procede et dispositif correspondants de decodage

Also Published As

Publication number Publication date
US20110066917A1 (en) 2011-03-17
FR2950209A1 (fr) 2011-03-18
US8468438B2 (en) 2013-06-18
US20130283119A1 (en) 2013-10-24

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