FR2925725B1 - Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin - Google Patents

Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin

Info

Publication number
FR2925725B1
FR2925725B1 FR0709049A FR0709049A FR2925725B1 FR 2925725 B1 FR2925725 B1 FR 2925725B1 FR 0709049 A FR0709049 A FR 0709049A FR 0709049 A FR0709049 A FR 0709049A FR 2925725 B1 FR2925725 B1 FR 2925725B1
Authority
FR
France
Prior art keywords
modeling
tunnel junction
magnetic tunnel
polarized current
current wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0709049A
Other languages
English (en)
Other versions
FR2925725A1 (fr
Inventor
Guillaume Prenat
Wei Guo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0709049A priority Critical patent/FR2925725B1/fr
Priority to CN2008801271075A priority patent/CN102007544A/zh
Priority to US12/809,991 priority patent/US8443318B2/en
Priority to JP2010538691A priority patent/JP2011509494A/ja
Priority to PCT/EP2008/067677 priority patent/WO2009080636A1/fr
Priority to EP08864252.5A priority patent/EP2232497B1/fr
Publication of FR2925725A1 publication Critical patent/FR2925725A1/fr
Application granted granted Critical
Publication of FR2925725B1 publication Critical patent/FR2925725B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
FR0709049A 2007-12-21 2007-12-21 Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin Expired - Fee Related FR2925725B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR0709049A FR2925725B1 (fr) 2007-12-21 2007-12-21 Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin
CN2008801271075A CN102007544A (zh) 2007-12-21 2008-12-16 用于模拟具有自旋极化电流写入的磁隧道结的方法
US12/809,991 US8443318B2 (en) 2007-12-21 2008-12-16 Method for modeling a magnetic tunnel junction with spin-polarized current writing
JP2010538691A JP2011509494A (ja) 2007-12-21 2008-12-16 スピン偏極した電流の書き込みを伴う磁気トンネル接合のモデル化方法
PCT/EP2008/067677 WO2009080636A1 (fr) 2007-12-21 2008-12-16 Méthode de modélisation d'une jonction de tunnel magnétique avec écriture par courant polarisé en spin
EP08864252.5A EP2232497B1 (fr) 2007-12-21 2008-12-16 Méthode de modélisation d'une jonction de tunnel magnétique avec écriture par courant polarisé en spin

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0709049A FR2925725B1 (fr) 2007-12-21 2007-12-21 Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin

Publications (2)

Publication Number Publication Date
FR2925725A1 FR2925725A1 (fr) 2009-06-26
FR2925725B1 true FR2925725B1 (fr) 2011-03-25

Family

ID=39811986

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0709049A Expired - Fee Related FR2925725B1 (fr) 2007-12-21 2007-12-21 Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin

Country Status (6)

Country Link
US (1) US8443318B2 (fr)
EP (1) EP2232497B1 (fr)
JP (1) JP2011509494A (fr)
CN (1) CN102007544A (fr)
FR (1) FR2925725B1 (fr)
WO (1) WO2009080636A1 (fr)

Families Citing this family (81)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7911832B2 (en) 2003-08-19 2011-03-22 New York University High speed low power magnetic devices based on current induced spin-momentum transfer
US8755222B2 (en) 2003-08-19 2014-06-17 New York University Bipolar spin-transfer switching
US9812184B2 (en) 2007-10-31 2017-11-07 New York University Current induced spin-momentum transfer stack with dual insulating layers
JP5698651B2 (ja) * 2011-12-16 2015-04-08 ルネサスエレクトロニクス株式会社 半導体記憶装置
US9082888B2 (en) 2012-10-17 2015-07-14 New York University Inverted orthogonal spin transfer layer stack
US9082950B2 (en) 2012-10-17 2015-07-14 New York University Increased magnetoresistance in an inverted orthogonal spin transfer layer stack
US8982613B2 (en) 2013-06-17 2015-03-17 New York University Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates
US9263667B1 (en) 2014-07-25 2016-02-16 Spin Transfer Technologies, Inc. Method for manufacturing MTJ memory device
US9337412B2 (en) 2014-09-22 2016-05-10 Spin Transfer Technologies, Inc. Magnetic tunnel junction structure for MRAM device
US9997225B2 (en) * 2014-12-10 2018-06-12 Globalfoundries Singapore Pte. Ltd. System and method for modular simulation of spin transfer torque magnetic random access memory devices
US10468590B2 (en) 2015-04-21 2019-11-05 Spin Memory, Inc. High annealing temperature perpendicular magnetic anisotropy structure for magnetic random access memory
US9728712B2 (en) 2015-04-21 2017-08-08 Spin Transfer Technologies, Inc. Spin transfer torque structure for MRAM devices having a spin current injection capping layer
US9853206B2 (en) 2015-06-16 2017-12-26 Spin Transfer Technologies, Inc. Precessional spin current structure for MRAM
US9773974B2 (en) 2015-07-30 2017-09-26 Spin Transfer Technologies, Inc. Polishing stop layer(s) for processing arrays of semiconductor elements
US10163479B2 (en) 2015-08-14 2018-12-25 Spin Transfer Technologies, Inc. Method and apparatus for bipolar memory write-verify
US9741926B1 (en) 2016-01-28 2017-08-22 Spin Transfer Technologies, Inc. Memory cell having magnetic tunnel junction and thermal stability enhancement layer
US10437723B2 (en) 2016-09-27 2019-10-08 Spin Memory, Inc. Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device
US10446210B2 (en) 2016-09-27 2019-10-15 Spin Memory, Inc. Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers
US10437491B2 (en) 2016-09-27 2019-10-08 Spin Memory, Inc. Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register
US10628316B2 (en) 2016-09-27 2020-04-21 Spin Memory, Inc. Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy register
US10460781B2 (en) 2016-09-27 2019-10-29 Spin Memory, Inc. Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank
US11151042B2 (en) 2016-09-27 2021-10-19 Integrated Silicon Solution, (Cayman) Inc. Error cache segmentation for power reduction
US10366774B2 (en) 2016-09-27 2019-07-30 Spin Memory, Inc. Device with dynamic redundancy registers
US11119910B2 (en) 2016-09-27 2021-09-14 Spin Memory, Inc. Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments
US11119936B2 (en) 2016-09-27 2021-09-14 Spin Memory, Inc. Error cache system with coarse and fine segments for power optimization
US10546625B2 (en) 2016-09-27 2020-01-28 Spin Memory, Inc. Method of optimizing write voltage based on error buffer occupancy
US10360964B2 (en) 2016-09-27 2019-07-23 Spin Memory, Inc. Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device
US10991410B2 (en) 2016-09-27 2021-04-27 Spin Memory, Inc. Bi-polar write scheme
US10818331B2 (en) 2016-09-27 2020-10-27 Spin Memory, Inc. Multi-chip module for MRAM devices with levels of dynamic redundancy registers
US10672976B2 (en) 2017-02-28 2020-06-02 Spin Memory, Inc. Precessional spin current structure with high in-plane magnetization for MRAM
US10665777B2 (en) 2017-02-28 2020-05-26 Spin Memory, Inc. Precessional spin current structure with non-magnetic insertion layer for MRAM
US10032978B1 (en) 2017-06-27 2018-07-24 Spin Transfer Technologies, Inc. MRAM with reduced stray magnetic fields
US10529439B2 (en) 2017-10-24 2020-01-07 Spin Memory, Inc. On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects
US10489245B2 (en) 2017-10-24 2019-11-26 Spin Memory, Inc. Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them
US10481976B2 (en) 2017-10-24 2019-11-19 Spin Memory, Inc. Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers
US10656994B2 (en) 2017-10-24 2020-05-19 Spin Memory, Inc. Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques
US10679685B2 (en) 2017-12-27 2020-06-09 Spin Memory, Inc. Shared bit line array architecture for magnetoresistive memory
US10891997B2 (en) 2017-12-28 2021-01-12 Spin Memory, Inc. Memory array with horizontal source line and a virtual source line
US10424726B2 (en) 2017-12-28 2019-09-24 Spin Memory, Inc. Process for improving photoresist pillar adhesion during MRAM fabrication
US10395712B2 (en) 2017-12-28 2019-08-27 Spin Memory, Inc. Memory array with horizontal source line and sacrificial bitline per virtual source
US10811594B2 (en) 2017-12-28 2020-10-20 Spin Memory, Inc. Process for hard mask development for MRAM pillar formation using photolithography
US10360962B1 (en) 2017-12-28 2019-07-23 Spin Memory, Inc. Memory array with individually trimmable sense amplifiers
US10395711B2 (en) 2017-12-28 2019-08-27 Spin Memory, Inc. Perpendicular source and bit lines for an MRAM array
US10840436B2 (en) 2017-12-29 2020-11-17 Spin Memory, Inc. Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture
US10546624B2 (en) 2017-12-29 2020-01-28 Spin Memory, Inc. Multi-port random access memory
US10270027B1 (en) 2017-12-29 2019-04-23 Spin Memory, Inc. Self-generating AC current assist in orthogonal STT-MRAM
US10236047B1 (en) 2017-12-29 2019-03-19 Spin Memory, Inc. Shared oscillator (STNO) for MRAM array write-assist in orthogonal STT-MRAM
US10784439B2 (en) 2017-12-29 2020-09-22 Spin Memory, Inc. Precessional spin current magnetic tunnel junction devices and methods of manufacture
US10840439B2 (en) 2017-12-29 2020-11-17 Spin Memory, Inc. Magnetic tunnel junction (MTJ) fabrication methods and systems
US10360961B1 (en) 2017-12-29 2019-07-23 Spin Memory, Inc. AC current pre-charge write-assist in orthogonal STT-MRAM
US10886330B2 (en) 2017-12-29 2021-01-05 Spin Memory, Inc. Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch
US10199083B1 (en) 2017-12-29 2019-02-05 Spin Transfer Technologies, Inc. Three-terminal MRAM with ac write-assist for low read disturb
US10424723B2 (en) 2017-12-29 2019-09-24 Spin Memory, Inc. Magnetic tunnel junction devices including an optimization layer
US10236048B1 (en) 2017-12-29 2019-03-19 Spin Memory, Inc. AC current write-assist in orthogonal STT-MRAM
US10367139B2 (en) 2017-12-29 2019-07-30 Spin Memory, Inc. Methods of manufacturing magnetic tunnel junction devices
US10339993B1 (en) 2017-12-30 2019-07-02 Spin Memory, Inc. Perpendicular magnetic tunnel junction device with skyrmionic assist layers for free layer switching
US10229724B1 (en) 2017-12-30 2019-03-12 Spin Memory, Inc. Microwave write-assist in series-interconnected orthogonal STT-MRAM devices
US10141499B1 (en) 2017-12-30 2018-11-27 Spin Transfer Technologies, Inc. Perpendicular magnetic tunnel junction device with offset precessional spin current layer
US10319900B1 (en) 2017-12-30 2019-06-11 Spin Memory, Inc. Perpendicular magnetic tunnel junction device with precessional spin current layer having a modulated moment density
US10236439B1 (en) 2017-12-30 2019-03-19 Spin Memory, Inc. Switching and stability control for perpendicular magnetic tunnel junction device
US10255962B1 (en) 2017-12-30 2019-04-09 Spin Memory, Inc. Microwave write-assist in orthogonal STT-MRAM
US10468588B2 (en) 2018-01-05 2019-11-05 Spin Memory, Inc. Perpendicular magnetic tunnel junction device with skyrmionic enhancement layers for the precessional spin current magnetic layer
US10438996B2 (en) 2018-01-08 2019-10-08 Spin Memory, Inc. Methods of fabricating magnetic tunnel junctions integrated with selectors
US10438995B2 (en) 2018-01-08 2019-10-08 Spin Memory, Inc. Devices including magnetic tunnel junctions integrated with selectors
US10388861B1 (en) 2018-03-08 2019-08-20 Spin Memory, Inc. Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same
US10446744B2 (en) 2018-03-08 2019-10-15 Spin Memory, Inc. Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same
US10784437B2 (en) 2018-03-23 2020-09-22 Spin Memory, Inc. Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
US10529915B2 (en) 2018-03-23 2020-01-07 Spin Memory, Inc. Bit line structures for three-dimensional arrays with magnetic tunnel junction devices including an annular free magnetic layer and a planar reference magnetic layer
US11107978B2 (en) 2018-03-23 2021-08-31 Spin Memory, Inc. Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
US11107974B2 (en) 2018-03-23 2021-08-31 Spin Memory, Inc. Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer
US10411185B1 (en) 2018-05-30 2019-09-10 Spin Memory, Inc. Process for creating a high density magnetic tunnel junction array test platform
US10593396B2 (en) 2018-07-06 2020-03-17 Spin Memory, Inc. Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations
US10692569B2 (en) 2018-07-06 2020-06-23 Spin Memory, Inc. Read-out techniques for multi-bit cells
US10559338B2 (en) 2018-07-06 2020-02-11 Spin Memory, Inc. Multi-bit cell read-out techniques
US10600478B2 (en) 2018-07-06 2020-03-24 Spin Memory, Inc. Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations
US10650875B2 (en) 2018-08-21 2020-05-12 Spin Memory, Inc. System for a wide temperature range nonvolatile memory
US10699761B2 (en) 2018-09-18 2020-06-30 Spin Memory, Inc. Word line decoder memory architecture
US10971680B2 (en) 2018-10-01 2021-04-06 Spin Memory, Inc. Multi terminal device stack formation methods
US11621293B2 (en) 2018-10-01 2023-04-04 Integrated Silicon Solution, (Cayman) Inc. Multi terminal device stack systems and methods
US10580827B1 (en) 2018-11-16 2020-03-03 Spin Memory, Inc. Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching
US11107979B2 (en) 2018-12-28 2021-08-31 Spin Memory, Inc. Patterned silicide structures and methods of manufacture

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7573737B2 (en) * 2003-08-19 2009-08-11 New York University High speed low power magnetic devices based on current induced spin-momentum transfer
US7266486B2 (en) * 2004-03-23 2007-09-04 Freescale Semiconductor, Inc. Magnetoresistive random access memory simulation
US7088609B2 (en) * 2004-05-11 2006-08-08 Grandis, Inc. Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
TWI292231B (en) * 2005-09-21 2008-01-01 Ind Tech Res Inst Simulating circuit for magnetic tunnel junction device
JP2007294010A (ja) * 2006-04-25 2007-11-08 Sony Corp 記憶素子の記録方法、メモリ

Also Published As

Publication number Publication date
US20110055794A1 (en) 2011-03-03
JP2011509494A (ja) 2011-03-24
EP2232497B1 (fr) 2013-08-28
FR2925725A1 (fr) 2009-06-26
WO2009080636A1 (fr) 2009-07-02
EP2232497A1 (fr) 2010-09-29
CN102007544A (zh) 2011-04-06
US8443318B2 (en) 2013-05-14

Similar Documents

Publication Publication Date Title
FR2925725B1 (fr) Procede de modelisation d'une jonction tunnel magnetique a ecriture par courant polarise en spin
DE602006018405D1 (de) Drehende elektrische Klauenpolmaschine
FI20086202A0 (fi) Kestomagneettimoduuli sähkökonetta varten
TWI563700B (en) Method of forming a magnetic tunnel junction device
BRPI0907144A2 (pt) célula de junção túnel magnética incluindo múltiplos domínios magnéticos
ITMI20062512A1 (it) Dispositivo di giunzione per assiemi magnetici strutturali
BRPI0816739A2 (pt) Unidade condutora de fluxo magnético
FR2927481B1 (fr) Procede de montage d'un pole magnetique et rotor associe.
GB2433600B (en) Device for magnetic field generation
CY20112200001T2 (el) Ενισχυμενη με μακροφαγα μαγνητικη τομογραφια (memri)
FI20070185A0 (fi) Menetelmä sähkökoneen käämivyyhden valmistamiseksi ja sähkökoneen käämitys
GB0523631D0 (en) Magnetic tagging techniques
DE602005010662D1 (de) Magnetische Tunnelübergangsanordnung mit amorpher NiFeSiB Freischicht
FI20060684A (fi) Sähkökoneen jäähdytysjärjestely
DE502007003786D1 (de) Elektrische Maschine mit Magnetbremse direkt am Rotor
GB2464446B (en) Electrical tagging device
SI2073346T1 (sl) Električen stroj z obdanim magnetnim polom trajnega magneta
EP2187508A4 (fr) Système de machine électrique tournante du type à commande de répartition de flux magnétique
FI20060340A0 (fi) Kestomagneetin napaelementti
FR2980317B1 (fr) Procede d'assemblage d'une machine electrique a aimants permanents
DE602006006383D1 (de) Elektrische Anschlussbox
FR2934412B1 (fr) Materiau magnetique a base de semi-conducteur
DE602005002165D1 (de) Elektrischer Verbindungskasten
DE602006019335D1 (de) Elektrische Steckervorrichtung für Fahrrad
DE102007022508A8 (de) Lageranordnung für eine elektrische Maschine

Legal Events

Date Code Title Description
TQ Partial transmission of property
ST Notification of lapse

Effective date: 20160831