FR2898729B1 - Dispositif semi-conducteur et procede d'implantation de dopants dans un canal - Google Patents

Dispositif semi-conducteur et procede d'implantation de dopants dans un canal

Info

Publication number
FR2898729B1
FR2898729B1 FR0602376A FR0602376A FR2898729B1 FR 2898729 B1 FR2898729 B1 FR 2898729B1 FR 0602376 A FR0602376 A FR 0602376A FR 0602376 A FR0602376 A FR 0602376A FR 2898729 B1 FR2898729 B1 FR 2898729B1
Authority
FR
France
Prior art keywords
channel
semiconductor device
implanting dopants
dopants
implanting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0602376A
Other languages
English (en)
Other versions
FR2898729A1 (fr
Inventor
Olivier Menut
Nicolas Planes
Medico Sylvie Del
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0602376A priority Critical patent/FR2898729B1/fr
Priority to US11/687,413 priority patent/US7488653B2/en
Publication of FR2898729A1 publication Critical patent/FR2898729A1/fr
Application granted granted Critical
Publication of FR2898729B1 publication Critical patent/FR2898729B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Ceramic Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR0602376A 2006-03-17 2006-03-17 Dispositif semi-conducteur et procede d'implantation de dopants dans un canal Expired - Fee Related FR2898729B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0602376A FR2898729B1 (fr) 2006-03-17 2006-03-17 Dispositif semi-conducteur et procede d'implantation de dopants dans un canal
US11/687,413 US7488653B2 (en) 2006-03-17 2007-03-16 Semiconductor device and method for implantation of doping agents in a channel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0602376A FR2898729B1 (fr) 2006-03-17 2006-03-17 Dispositif semi-conducteur et procede d'implantation de dopants dans un canal

Publications (2)

Publication Number Publication Date
FR2898729A1 FR2898729A1 (fr) 2007-09-21
FR2898729B1 true FR2898729B1 (fr) 2008-08-01

Family

ID=37487539

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0602376A Expired - Fee Related FR2898729B1 (fr) 2006-03-17 2006-03-17 Dispositif semi-conducteur et procede d'implantation de dopants dans un canal

Country Status (2)

Country Link
US (1) US7488653B2 (fr)
FR (1) FR2898729B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2898729B1 (fr) * 2006-03-17 2008-08-01 St Microelectronics Dispositif semi-conducteur et procede d'implantation de dopants dans un canal
JP2009218580A (ja) * 2008-03-06 2009-09-24 Toshiba Corp ２方向ハロ注入
US7883946B1 (en) * 2008-05-08 2011-02-08 Altera Corporation Angled implantation for deep submicron device optimization
JP5886496B2 (ja) * 2011-05-20 2016-03-16 株式会社半導体エネルギー研究所 半導体装置
US8298895B1 (en) * 2011-10-31 2012-10-30 International Business Machines Corporation Selective threshold voltage implants for long channel devices
US9898393B2 (en) * 2011-11-22 2018-02-20 Solano Labs, Inc. System for distributed software quality improvement
CN104576536B (zh) * 2013-10-10 2017-11-14 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法和电子装置
CN111293174A (zh) * 2020-02-25 2020-06-16 英诺赛科（珠海）科技有限公司 半导体器件及其制造方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4843590A (fr) * 1971-10-04 1973-06-23
US4315781A (en) * 1980-04-23 1982-02-16 Hughes Aircraft Company Method of controlling MOSFET threshold voltage with self-aligned channel stop
JP3159850B2 (ja) * 1993-11-08 2001-04-23 シャープ株式会社 不揮発性半導体記憶装置及びその製造方法
US5536962A (en) * 1994-11-07 1996-07-16 Motorola, Inc. Semiconductor device having a buried channel transistor
US5516711A (en) * 1994-12-16 1996-05-14 Mosel Vitelic, Inc. Method for forming LDD CMOS with oblique implantation
JP3472655B2 (ja) * 1995-10-16 2003-12-02 ユー・エム・シー・ジャパン株式会社 半導体装置
US6100568A (en) * 1997-11-06 2000-08-08 Motorola, Inc. Semiconductor device including a memory cell and peripheral portion and method for forming same
TW388087B (en) * 1997-11-20 2000-04-21 Winbond Electronics Corp Method of forming buried-channel P-type metal oxide semiconductor
US6207999B1 (en) * 1998-05-04 2001-03-27 Texas Instruments-Acer Incorporated Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage
US6312997B1 (en) * 1998-08-12 2001-11-06 Micron Technology, Inc. Low voltage high performance semiconductor devices and methods
JP2000260886A (ja) * 1999-03-11 2000-09-22 Toshiba Corp 半導体記憶装置及びその製造方法
US6255174B1 (en) * 1999-06-15 2001-07-03 Advanced Micro Devices, Inc. Mos transistor with dual pocket implant
US6329235B1 (en) * 1999-10-20 2001-12-11 United Microelectronics Corp. Method of performing a pocket implantation on a MOS transistor of a memory cell of a DRAM
US6621125B1 (en) * 2000-05-11 2003-09-16 United Microelectronics Corp. Buried channel device structure
US20030080390A1 (en) * 2001-11-01 2003-05-01 Horng-Huei Tseng Method of fabricating W/TiN gate for MOSFETS
KR100468785B1 (ko) * 2003-02-19 2005-01-29 삼성전자주식회사 포켓영역을 구비하는 모스 전계효과 트랜지스터의 제조방법
JP2004363234A (ja) * 2003-06-03 2004-12-24 Renesas Technology Corp 半導体装置の製造方法
WO2004112139A1 (fr) * 2003-06-10 2004-12-23 Fujitsu Limited Dispositif semi-conducteur et procede de fabrication de celui-ci
US7176530B1 (en) * 2004-03-17 2007-02-13 National Semiconductor Corporation Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor
FR2898729B1 (fr) * 2006-03-17 2008-08-01 St Microelectronics Dispositif semi-conducteur et procede d'implantation de dopants dans un canal
JP4314252B2 (ja) * 2006-07-03 2009-08-12 株式会社東芝 不揮発性半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
FR2898729A1 (fr) 2007-09-21
US20080012052A1 (en) 2008-01-17
US7488653B2 (en) 2009-02-10

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