FR2882601B1 - EMULATION / SIMULATION OF A LOGIC CIRCUIT - Google Patents

EMULATION / SIMULATION OF A LOGIC CIRCUIT

Info

Publication number
FR2882601B1
FR2882601B1 FR0550521A FR0550521A FR2882601B1 FR 2882601 B1 FR2882601 B1 FR 2882601B1 FR 0550521 A FR0550521 A FR 0550521A FR 0550521 A FR0550521 A FR 0550521A FR 2882601 B1 FR2882601 B1 FR 2882601B1
Authority
FR
France
Prior art keywords
emulation
simulation
logic circuit
logic
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0550521A
Other languages
French (fr)
Other versions
FR2882601A1 (en
Inventor
Michel Nicolaidis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iroc Technologies SA
Original Assignee
Iroc Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iroc Technologies SA filed Critical Iroc Technologies SA
Priority to FR0550521A priority Critical patent/FR2882601B1/en
Priority to PCT/FR2006/050164 priority patent/WO2006090089A1/en
Publication of FR2882601A1 publication Critical patent/FR2882601A1/en
Application granted granted Critical
Publication of FR2882601B1 publication Critical patent/FR2882601B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FR0550521A 2005-02-25 2005-02-25 EMULATION / SIMULATION OF A LOGIC CIRCUIT Active FR2882601B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0550521A FR2882601B1 (en) 2005-02-25 2005-02-25 EMULATION / SIMULATION OF A LOGIC CIRCUIT
PCT/FR2006/050164 WO2006090089A1 (en) 2005-02-25 2006-02-24 Emulating/simulating a logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0550521A FR2882601B1 (en) 2005-02-25 2005-02-25 EMULATION / SIMULATION OF A LOGIC CIRCUIT

Publications (2)

Publication Number Publication Date
FR2882601A1 FR2882601A1 (en) 2006-09-01
FR2882601B1 true FR2882601B1 (en) 2007-10-12

Family

ID=34955330

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0550521A Active FR2882601B1 (en) 2005-02-25 2005-02-25 EMULATION / SIMULATION OF A LOGIC CIRCUIT

Country Status (2)

Country Link
FR (1) FR2882601B1 (en)
WO (1) WO2006090089A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59136843A (en) * 1983-01-27 1984-08-06 Yokogawa Hokushin Electric Corp Working check method for error correcting function in serial data transfer
US5668816A (en) * 1996-08-19 1997-09-16 International Business Machines Corporation Method and apparatus for injecting errors into an array built-in self-test
JPH11149491A (en) * 1997-11-17 1999-06-02 Toshiba Corp Fault detection rate evaluation method
US6385750B1 (en) * 1999-09-01 2002-05-07 Synopsys, Inc. Method and system for controlling test data volume in deterministic test pattern generation
EP1246033A1 (en) * 2001-08-23 2002-10-02 Siemens Aktiengesellschaft Method for monitoring consistent memory contents in a redundant system

Also Published As

Publication number Publication date
WO2006090089A1 (en) 2006-08-31
FR2882601A1 (en) 2006-09-01

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