FR2871976B1 - Decodeur ldpc - Google Patents

Decodeur ldpc

Info

Publication number
FR2871976B1
FR2871976B1 FR0451308A FR0451308A FR2871976B1 FR 2871976 B1 FR2871976 B1 FR 2871976B1 FR 0451308 A FR0451308 A FR 0451308A FR 0451308 A FR0451308 A FR 0451308A FR 2871976 B1 FR2871976 B1 FR 2871976B1
Authority
FR
France
Prior art keywords
ldpc decoder
ldpc
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0451308A
Other languages
English (en)
Other versions
FR2871976A1 (fr
Inventor
Pascal Urard
Laurent Paumier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0451308A priority Critical patent/FR2871976B1/fr
Priority to US11/158,718 priority patent/US7454693B2/en
Publication of FR2871976A1 publication Critical patent/FR2871976A1/fr
Application granted granted Critical
Publication of FR2871976B1 publication Critical patent/FR2871976B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
FR0451308A 2004-06-22 2004-06-22 Decodeur ldpc Expired - Fee Related FR2871976B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0451308A FR2871976B1 (fr) 2004-06-22 2004-06-22 Decodeur ldpc
US11/158,718 US7454693B2 (en) 2004-06-22 2005-06-22 LDPC decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0451308A FR2871976B1 (fr) 2004-06-22 2004-06-22 Decodeur ldpc

Publications (2)

Publication Number Publication Date
FR2871976A1 FR2871976A1 (fr) 2005-12-23
FR2871976B1 true FR2871976B1 (fr) 2006-08-11

Family

ID=34945697

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0451308A Expired - Fee Related FR2871976B1 (fr) 2004-06-22 2004-06-22 Decodeur ldpc

Country Status (2)

Country Link
US (1) US7454693B2 (fr)
FR (1) FR2871976B1 (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2871975B1 (fr) * 2004-06-22 2006-08-11 St Microelectronics Sa Decodeur ldpc
FR2900294B1 (fr) 2006-04-19 2008-07-04 St Microelectronics Sa Chargement de la memoire d'entree d'un decodeur ldpc avec des donnees a decoder
US7647548B2 (en) * 2006-07-31 2010-01-12 Agere Systems Inc. Methods and apparatus for low-density parity check decoding using hardware-sharing and serial sum-product architecture
US8144170B2 (en) * 2007-03-28 2012-03-27 Himax Technologies Limited Apparatus for scaling image and line buffer thereof
US8418023B2 (en) * 2007-05-01 2013-04-09 The Texas A&M University System Low density parity check decoder for irregular LDPC codes
US8102721B2 (en) * 2007-06-27 2012-01-24 Infineon Technologies Ag Pseudo dual-port memory
US7911364B1 (en) 2007-09-04 2011-03-22 Marvell International Ltd. Interleaver for turbo equalization
WO2009153746A2 (fr) * 2008-06-18 2009-12-23 Nxp B.V. Procédé et système permettant le stockage d’informations dans un nœud et destinés à un décodeur à contrôle de parité binaire à faible densité
US8335979B2 (en) * 2008-12-08 2012-12-18 Samsung Electronics Co., Ltd. Contention-free parallel processing multimode LDPC decoder
EP2614594A1 (fr) * 2010-09-08 2013-07-17 Agence Spatiale Européenne Décodeur de canal flexible
US8902672B2 (en) * 2013-01-01 2014-12-02 Memoir Systems, Inc. Methods and apparatus for designing and constructing multi-port memory circuits
GB2517850B (en) 2013-08-27 2015-08-05 Imagination Tech Ltd An improved decoder for low-density parity-check codes
CN104579362B (zh) * 2014-12-30 2017-10-24 北京遥测技术研究所 一种空间通信系统中部分并行结构ldpc码译码系统及其方法
US10102892B1 (en) * 2017-06-01 2018-10-16 Intel Corporation RAM-based shift register with embedded addressing

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7178080B2 (en) * 2002-08-15 2007-02-13 Texas Instruments Incorporated Hardware-efficient low density parity check code for digital communications
KR100762619B1 (ko) * 2004-05-21 2007-10-01 삼성전자주식회사 저밀도 패리티 검사 코드를 이용한 복호화 장치 및 방법

Also Published As

Publication number Publication date
US7454693B2 (en) 2008-11-18
US20050281111A1 (en) 2005-12-22
FR2871976A1 (fr) 2005-12-23

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20150227