FR2864734A1 - Modulateur sigma-delta numerique simple boucle d'ordre eleve - Google Patents
Modulateur sigma-delta numerique simple boucle d'ordre eleve Download PDFInfo
- Publication number
- FR2864734A1 FR2864734A1 FR0315614A FR0315614A FR2864734A1 FR 2864734 A1 FR2864734 A1 FR 2864734A1 FR 0315614 A FR0315614 A FR 0315614A FR 0315614 A FR0315614 A FR 0315614A FR 2864734 A1 FR2864734 A1 FR 2864734A1
- Authority
- FR
- France
- Prior art keywords
- sigma
- integrator
- delta modulator
- input
- feedback
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000006870 function Effects 0.000 description 15
- 238000005070 sampling Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 8
- 238000013139 quantization Methods 0.000 description 8
- 230000004044 response Effects 0.000 description 8
- 238000007792 addition Methods 0.000 description 6
- 238000007493 shaping process Methods 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 3
- 230000014509 gene expression Effects 0.000 description 3
- 230000003595 spectral effect Effects 0.000 description 3
- 238000013016 damping Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
- H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
- H03M7/3035—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with provisions for rendering the modulator inherently stable, e.g. by restricting the swing within the loop, by removing part of the zeroes using local feedback loops, by positioning zeroes outside the unit circle causing the modulator to operate in a chaotic regime
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
- H03M7/3026—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
- H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
- H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
Description
Claims (12)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0315614A FR2864734B1 (fr) | 2003-12-31 | 2003-12-31 | Modulateur sigma-delta numerique simple boucle d'ordre eleve |
PCT/EP2004/014411 WO2005064798A1 (fr) | 2003-12-31 | 2004-12-17 | Modulateur sigma-delta numerique a boucle unique d'ordre eleve |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0315614A FR2864734B1 (fr) | 2003-12-31 | 2003-12-31 | Modulateur sigma-delta numerique simple boucle d'ordre eleve |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2864734A1 true FR2864734A1 (fr) | 2005-07-01 |
FR2864734B1 FR2864734B1 (fr) | 2006-03-03 |
Family
ID=34639724
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0315614A Expired - Lifetime FR2864734B1 (fr) | 2003-12-31 | 2003-12-31 | Modulateur sigma-delta numerique simple boucle d'ordre eleve |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR2864734B1 (fr) |
WO (1) | WO2005064798A1 (fr) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030081687A1 (en) * | 2001-10-27 | 2003-05-01 | Tsung-Yi Su | Three-order sigma-delta modulator |
-
2003
- 2003-12-31 FR FR0315614A patent/FR2864734B1/fr not_active Expired - Lifetime
-
2004
- 2004-12-17 WO PCT/EP2004/014411 patent/WO2005064798A1/fr active Application Filing
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030081687A1 (en) * | 2001-10-27 | 2003-05-01 | Tsung-Yi Su | Three-order sigma-delta modulator |
Non-Patent Citations (2)
Title |
---|
RHEE W ET AL: "A 1.1-GHZ CMOS FRACTIONAL-N FREQUENCY SYNTHESIZER WITH A 3-B THIRD-ORDER DELTAEPSILON MODULATOR", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 35, no. 10, October 2000 (2000-10-01), pages 1453 - 1459, XP001143290, ISSN: 0018-9200 * |
SANG OH LEE ET AL: "A 17mW, 2.5GHz Fractional-N Frequency Synthesizer for CDMA-2000", PROCEEDINGS OF THE EUROPEAN SOLID STATE CIRCUITS CONFERENCE, XX, XX, 18 September 2001 (2001-09-18), pages 1 - 4, XP002277189 * |
Also Published As
Publication number | Publication date |
---|---|
WO2005064798A1 (fr) | 2005-07-14 |
FR2864734B1 (fr) | 2006-03-03 |
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Effective date: 20130722 |
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TP | Transmission of property |
Owner name: CASSIDIAN SAS, FR Effective date: 20130722 |
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CD | Change of name or company name |
Owner name: AIRBUS DS SAS, FR Effective date: 20150106 |
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