FR2858114B1 - Transistor a effet de champ silicium sur isolant a double canal vertical et procede de fabrication - Google Patents

Transistor a effet de champ silicium sur isolant a double canal vertical et procede de fabrication

Info

Publication number
FR2858114B1
FR2858114B1 FR0406073A FR0406073A FR2858114B1 FR 2858114 B1 FR2858114 B1 FR 2858114B1 FR 0406073 A FR0406073 A FR 0406073A FR 0406073 A FR0406073 A FR 0406073A FR 2858114 B1 FR2858114 B1 FR 2858114B1
Authority
FR
France
Prior art keywords
manufacture
field effect
effect transistor
dual channel
silicon field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0406073A
Other languages
English (en)
Other versions
FR2858114A1 (fr
Inventor
Ji Young Kim
Jin Jun Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020030050938A external-priority patent/KR100568858B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2858114A1 publication Critical patent/FR2858114A1/fr
Application granted granted Critical
Publication of FR2858114B1 publication Critical patent/FR2858114B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR0406073A 2003-07-24 2004-06-04 Transistor a effet de champ silicium sur isolant a double canal vertical et procede de fabrication Expired - Lifetime FR2858114B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020030050938A KR100568858B1 (ko) 2003-07-24 2003-07-24 수직 이중 채널을 갖는 ｓｏｉ 트랜지스터의 제조 방법 및그에 따른 구조
US10/759,239 US6960507B2 (en) 2003-07-24 2004-01-20 Vertical double-channel silicon-on-insulator transistor and method of manufacturing the same

Publications (2)

Publication Number Publication Date
FR2858114A1 FR2858114A1 (fr) 2005-01-28
FR2858114B1 true FR2858114B1 (fr) 2007-05-25

Family

ID=32737773

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0406073A Expired - Lifetime FR2858114B1 (fr) 2003-07-24 2004-06-04 Transistor a effet de champ silicium sur isolant a double canal vertical et procede de fabrication

Country Status (6)

Country Link
US (1) US7262462B2 (fr)
CN (1) CN100524828C (fr)
DE (1) DE102004028709B4 (fr)
FR (1) FR2858114B1 (fr)
GB (1) GB2404283B (fr)
TW (1) TWI251342B (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7504306B2 (en) * 2005-04-06 2009-03-17 Fairchild Semiconductor Corporation Method of forming trench gate field effect transistor with recessed mesas
DE102005027459B4 (de) * 2005-06-14 2008-02-28 Qimonda Ag Herstellungsverfahren für eine Halbleiterstruktur mit einer Mehrzahl von überstehend gefüllten Isolationsgräben
US7790524B2 (en) * 2008-01-11 2010-09-07 International Business Machines Corporation Device and design structures for memory cells in a non-volatile random access memory and methods of fabricating such device structures
US7772651B2 (en) * 2008-01-11 2010-08-10 International Business Machines Corporation Semiconductor-on-insulator high-voltage device structures, methods of fabricating such device structures, and design structures for high-voltage circuits
US7790543B2 (en) * 2008-01-11 2010-09-07 International Business Machines Corporation Device structures for a metal-oxide-semiconductor field effect transistor and methods of fabricating such device structures
US7786535B2 (en) * 2008-01-11 2010-08-31 International Business Machines Corporation Design structures for high-voltage integrated circuits
DE102008045037B4 (de) * 2008-08-29 2010-12-30 Advanced Micro Devices, Inc., Sunnyvale Statischer RAM-Zellenaufbau und Mehrfachkontaktschema zum Anschluss von Doppelkanaltransistoren
CN102194684B (zh) * 2010-03-12 2013-02-27 中芯国际集成电路制造(上海)有限公司 栅极介质层制造方法
US9202921B2 (en) * 2010-03-30 2015-12-01 Nanya Technology Corp. Semiconductor device and method of making the same
US20120306005A1 (en) * 2011-06-04 2012-12-06 Kimihiro Satoh Trough channel transistor and methods for making the same
CN103472115B (zh) * 2013-08-16 2018-02-27 复旦大学 离子敏感场效应晶体管及其制备方法
CN107994037B (zh) * 2015-06-12 2019-07-26 江苏时代全芯存储科技股份有限公司 绝缘层覆硅结构
US9711644B2 (en) * 2015-09-14 2017-07-18 Globalfoundries Inc. Methods of making source/drain regions positioned inside U-shaped semiconductor material using source/drain placeholder structures
US10020395B2 (en) 2015-09-14 2018-07-10 Globalfoundries Inc. Semiconductor device with gate inside U-shaped channel and methods of making such a device
CN107872007B (zh) * 2016-09-27 2019-11-22 青岛海信宽带多媒体技术有限公司 一种激光器芯片的制作方法
US9853028B1 (en) * 2017-04-17 2017-12-26 International Business Machines Corporation Vertical FET with reduced parasitic capacitance
KR102337408B1 (ko) 2017-09-13 2021-12-10 삼성전자주식회사 수직 채널을 가지는 반도체 소자 및 그 제조 방법
CN117637816A (zh) * 2018-05-31 2024-03-01 长江存储科技有限责任公司 半导体器件及其制作方法
US11158624B1 (en) * 2020-04-24 2021-10-26 Globalfoundries U.S. Inc. Cascode cell
CN114937695B (zh) * 2022-07-25 2022-10-21 北京芯可鉴科技有限公司 双沟道ldmos器件及其制备方法以及芯片
CN117423659B (zh) * 2023-12-19 2024-04-12 合肥晶合集成电路股份有限公司 一种半导体结构及其制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920010963A (ko) 1990-11-23 1992-06-27 오가 노리오 Soi형 종채널 fet 및 그 제조방법
JPH11150265A (ja) * 1997-11-17 1999-06-02 Toshiba Corp 半導体装置
US6268630B1 (en) 1999-03-16 2001-07-31 Sandia Corporation Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications
US6683362B1 (en) * 1999-08-24 2004-01-27 Kenneth K. O Metal-semiconductor diode clamped complementary field effect transistor integrated circuits
US6355532B1 (en) * 1999-10-06 2002-03-12 Lsi Logic Corporation Subtractive oxidation method of fabricating a short-length and vertically-oriented channel, dual-gate, CMOS FET
JP2003533050A (ja) * 2000-05-10 2003-11-05 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体デバイス
KR100365411B1 (ko) 2000-06-30 2002-12-18 주식회사 하이닉스반도체 절연층상의 실리콘 금속 산화물 전계 효과 트랜지스터의제조 방법
US6406962B1 (en) * 2001-01-17 2002-06-18 International Business Machines Corporation Vertical trench-formed dual-gate FET device structure and method for creation
US6635923B2 (en) * 2001-05-24 2003-10-21 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
US6706571B1 (en) * 2002-10-22 2004-03-16 Advanced Micro Devices, Inc. Method for forming multiple structures in a semiconductor device
US6709982B1 (en) * 2002-11-26 2004-03-23 Advanced Micro Devices, Inc. Double spacer FinFET formation

Also Published As

Publication number Publication date
TWI251342B (en) 2006-03-11
DE102004028709A1 (de) 2005-03-03
DE102004028709B4 (de) 2007-10-18
CN100524828C (zh) 2009-08-05
FR2858114A1 (fr) 2005-01-28
TW200505020A (en) 2005-02-01
US20060027869A1 (en) 2006-02-09
GB2404283A (en) 2005-01-26
CN1577888A (zh) 2005-02-09
GB2404283B (en) 2005-11-23
GB0413239D0 (en) 2004-07-14
US7262462B2 (en) 2007-08-28

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