FR2857496B1 - Dispositif a memoire, notamment a memoire flash, et procede pour son fonctionnement - Google Patents
Dispositif a memoire, notamment a memoire flash, et procede pour son fonctionnementInfo
- Publication number
- FR2857496B1 FR2857496B1 FR0407707A FR0407707A FR2857496B1 FR 2857496 B1 FR2857496 B1 FR 2857496B1 FR 0407707 A FR0407707 A FR 0407707A FR 0407707 A FR0407707 A FR 0407707A FR 2857496 B1 FR2857496 B1 FR 2857496B1
- Authority
- FR
- France
- Prior art keywords
- operating
- same
- memory device
- particular flash
- flash memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10347541 | 2003-07-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2857496A1 FR2857496A1 (fr) | 2005-01-14 |
FR2857496B1 true FR2857496B1 (fr) | 2007-01-26 |
Family
ID=34399483
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0407707A Active FR2857496B1 (fr) | 2003-07-12 | 2004-07-09 | Dispositif a memoire, notamment a memoire flash, et procede pour son fonctionnement |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2857496B1 (fr) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5506816A (en) * | 1994-09-06 | 1996-04-09 | Nvx Corporation | Memory cell array having compact word line arrangement |
US5621690A (en) * | 1995-04-28 | 1997-04-15 | Intel Corporation | Nonvolatile memory blocking architecture and redundancy |
US5854770A (en) * | 1997-01-30 | 1998-12-29 | Sgs-Thomson Microelectronics S.R.L. | Decoding hierarchical architecture for high integration memories |
-
2004
- 2004-07-09 FR FR0407707A patent/FR2857496B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
FR2857496A1 (fr) | 2005-01-14 |
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Legal Events
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PLFP | Fee payment |
Year of fee payment: 13 |
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PLFP | Fee payment |
Year of fee payment: 20 |