FR2839386B1 - Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias - Google Patents

Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias

Info

Publication number
FR2839386B1
FR2839386B1 FR0205517A FR0205517A FR2839386B1 FR 2839386 B1 FR2839386 B1 FR 2839386B1 FR 0205517 A FR0205517 A FR 0205517A FR 0205517 A FR0205517 A FR 0205517A FR 2839386 B1 FR2839386 B1 FR 2839386B1
Authority
FR
France
Prior art keywords
redefining
volatile
metal
readable memory
vias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0205517A
Other languages
English (en)
Other versions
FR2839386A1 (fr
Inventor
Philippe Lebourg
Davide Tesi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0205517A priority Critical patent/FR2839386B1/fr
Priority to US10/427,713 priority patent/US6879506B2/en
Publication of FR2839386A1 publication Critical patent/FR2839386A1/fr
Application granted granted Critical
Publication of FR2839386B1 publication Critical patent/FR2839386B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
FR0205517A 2002-05-02 2002-05-02 Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias Expired - Fee Related FR2839386B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0205517A FR2839386B1 (fr) 2002-05-02 2002-05-02 Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias
US10/427,713 US6879506B2 (en) 2002-05-02 2003-05-01 Non-volatile read-only memory modifiable by redefinition of a metal or via level

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0205517A FR2839386B1 (fr) 2002-05-02 2002-05-02 Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias

Publications (2)

Publication Number Publication Date
FR2839386A1 FR2839386A1 (fr) 2003-11-07
FR2839386B1 true FR2839386B1 (fr) 2004-08-06

Family

ID=29226150

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0205517A Expired - Fee Related FR2839386B1 (fr) 2002-05-02 2002-05-02 Memoire non volatile a lecture seule modifiable par redefinition d'un niveau de metal ou de vias

Country Status (2)

Country Link
US (1) US6879506B2 (fr)
FR (1) FR2839386B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IE20070870A1 (en) * 2007-11-30 2009-08-05 Glonav Ltd A semiconductor integrated circuit device and a method of prototyping a semiconductor chip
US8872344B2 (en) * 2010-06-09 2014-10-28 Texas Instruments Incorporated Conductive via structures for routing porosity and low via resistance, and processes of making
TWI596732B (zh) * 2015-08-17 2017-08-21 領特公司 金屬層配置
CN107578788B (zh) * 2017-08-22 2020-03-31 珠海市杰理科技股份有限公司 用于记录芯片版本编号的逻辑电路及写入芯片版本编号的方法
US10833059B2 (en) 2018-12-07 2020-11-10 Micron Technology, Inc. Integrated assemblies comprising vertically-stacked decks of memory arrays
US11804440B2 (en) * 2021-01-28 2023-10-31 Globalfoundries U.S. Inc. Chip module with robust in-package interconnects

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2731288B2 (ja) * 1990-08-28 1998-03-25 株式会社日立製作所 多層配線方法
TW335494B (en) * 1996-11-29 1998-07-01 United Microelectronics Corp The decode method of high density ROM array
FR2794895B1 (fr) * 1999-06-11 2001-09-14 St Microelectronics Sa Dispositif semiconducteur integre de memoire morte
US6292024B1 (en) * 1999-12-14 2001-09-18 Philips Electronics North America Corporation Integrated circuit with a serpentine conductor track for circuit selection

Also Published As

Publication number Publication date
US6879506B2 (en) 2005-04-12
FR2839386A1 (fr) 2003-11-07
US20030214863A1 (en) 2003-11-20

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090119