FR2786009B1 - METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING - Google Patents

METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING

Info

Publication number
FR2786009B1
FR2786009B1 FR9814363A FR9814363A FR2786009B1 FR 2786009 B1 FR2786009 B1 FR 2786009B1 FR 9814363 A FR9814363 A FR 9814363A FR 9814363 A FR9814363 A FR 9814363A FR 2786009 B1 FR2786009 B1 FR 2786009B1
Authority
FR
France
Prior art keywords
double
manufacturing
chip card
sided printing
hybrid chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9814363A
Other languages
French (fr)
Other versions
FR2786009A1 (en
Inventor
Olivier Brunet
Jean Christophe Fidalgo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Priority to FR9814363A priority Critical patent/FR2786009B1/en
Priority to PCT/FR1999/002693 priority patent/WO2000030032A1/en
Priority to AU10516/00A priority patent/AU1051600A/en
Publication of FR2786009A1 publication Critical patent/FR2786009A1/en
Application granted granted Critical
Publication of FR2786009B1 publication Critical patent/FR2786009B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07766—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement
    • G06K19/07769—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
FR9814363A 1998-11-16 1998-11-16 METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING Expired - Fee Related FR2786009B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR9814363A FR2786009B1 (en) 1998-11-16 1998-11-16 METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING
PCT/FR1999/002693 WO2000030032A1 (en) 1998-11-16 1999-11-04 Method for making a hybrid smart card by double face printing
AU10516/00A AU1051600A (en) 1998-11-16 1999-11-04 Method for making a hybrid smart card by double face printing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9814363A FR2786009B1 (en) 1998-11-16 1998-11-16 METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING

Publications (2)

Publication Number Publication Date
FR2786009A1 FR2786009A1 (en) 2000-05-19
FR2786009B1 true FR2786009B1 (en) 2001-01-26

Family

ID=9532770

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9814363A Expired - Fee Related FR2786009B1 (en) 1998-11-16 1998-11-16 METHOD FOR MANUFACTURING A HYBRID CHIP CARD BY DOUBLE-SIDED PRINTING

Country Status (3)

Country Link
AU (1) AU1051600A (en)
FR (1) FR2786009B1 (en)
WO (1) WO2000030032A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2817373B1 (en) * 2000-11-30 2003-02-07 D Vito Antoine Orazio METHOD OF MANUFACTURING PORTABLE OBJECTS OF THE CONTACTLESS CARD TYPE
DE10139395A1 (en) 2001-08-10 2003-03-06 Infineon Technologies Ag Contacting of semiconductor chips in chip cards
DE10151941A1 (en) * 2001-10-22 2003-01-02 Infineon Technologies Ag Chip card or storage card, such as a multimedia card is configured as a TSLP package so that higher production rates can be achieved with lower production costs
FR2880160B1 (en) * 2004-12-28 2007-03-30 K Sa As DOUBLE-SIDED ELECTRONIC MODULE FOR HYBRID CHIP CARD
DE102005038132B4 (en) 2005-08-11 2008-04-03 Infineon Technologies Ag Chip module and chip card
DE102008019571A1 (en) * 2008-04-18 2009-10-22 Giesecke & Devrient Gmbh Chip card and method for its production
EP2189928A1 (en) * 2008-11-21 2010-05-26 Gemalto SA Device with integrated circuit equipped with different connection means
US9196554B2 (en) 2013-10-01 2015-11-24 Infineon Technologies Austria Ag Electronic component, arrangement and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4105869C2 (en) * 1991-02-25 2000-05-18 Edgar Schneider IC card and method of making it
US5574470A (en) * 1994-09-30 1996-11-12 Palomar Technologies Corporation Radio frequency identification transponder apparatus and method
FR2726106B1 (en) * 1994-10-21 1996-11-29 Solaic Sa ELECTRONIC CARD FOR USE WITH A CONTACTLESS CARD READER AND A CONTACT CARD READER
EP0706152B1 (en) * 1994-11-03 1998-06-10 Fela Holding AG Base sheet for chip card
FR2753305B1 (en) * 1996-09-12 1998-11-06 Schlumberger Ind Sa METHOD FOR MANUFACTURING AN ASSEMBLY OF ELECTRONIC MODULES FOR NON-CONTACT MEMORY CARDS

Also Published As

Publication number Publication date
AU1051600A (en) 2000-06-05
FR2786009A1 (en) 2000-05-19
WO2000030032A1 (en) 2000-05-25

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090731